User Guide

PAMS
Technical Documentation
NSB–1
System Module
Page 3 – 23
Original 06/98
Digital control
MAD
The baseband functions are controlled by the MAD asic, which consists of
a MCU, a system ASIC and a DSP. The DCS/PCN specific asic is named
as MAD2. There are separate controller asics in TDMA and JDC named
as MAD1 and MAD3. All the MAD asics contain the same core proces-
sors and similar building blocks, but differ from each other in system spe-
cific functions, pinout and package types.
MAD2 contains following building blocks:
– ARM RISC processor with both 16–bit instruction set (THUMB mode)
and 32–bit instruction set (ARM mode)
– TMS320C542 DSP core with peripherals:
– API (Arm Port Interface memory) for MCU–DSP commu-
nication, DSP code download, MCU interrupt handling vec-
tors (in DSP RAM) and DSP booting
– Serial port (connection to PCM)
– Timer
– DSP memory
– BUSC (BusController for controlling accesses from ARM to API, Sys-
tem Logic and MCU external memories, both 8– and 16–bit memories)
– System Logic
– CTSI (Clock, Timing, Sleep and Interrupt control)
– MCUIF (Interface to ARM via B
USC). Contains MCU Boo-
tROM
– DSPIF (Interface to DSP)
– MFI (Interface to COBBA AD/DA Converters)
– CODER (Block encoding/decoding and A51&A52 ciphering)
– AccIF(Accessory Interface)
– SCU (Synthesizer Control Unit for controlling 2 separate
synthesizer)
– UIF (Keyboard interface, serial control interface for COBBA
PCM Codec, LCD Driver and CCONT)
– SIMI (SimCard interface with enhanched features)
– PUP (Parallel IO, USART and PWM control unit for vibra
and buzzer)