User Guide

Nokia Customer Care System Module and User Interface

NPL-4/5

Figure 11: FCI Interface

Figure 12: FCI Connector Pin Order on PWB

Memory

For the MCU UPP includes ROM, 2 Kbytes, that is used mainly for boot code of MCU. To

speed up the

MCU operation small 64-byte cache is also integrated as a part of the MCU memory

interface. For program memory 8Mbit (512 x 16bit) PDRAM is integrated. RAM block can

UPP

VBAT

VIO

FC_SDA

FC_SCL

FC_INT

FC_Vout

FCI ASIP

ferrite

Cout

ferrite

Terminal Functional Cover

Cin

Reg.

Switch

Short Circuit

protection

MCU

GenIO_18

GenIO_22

GenIO_2

GenIO_25

ad-side FC conn.

Pad la

out

1. Vout

2. GND

3. SDA

4. SCL

5. FCIInt

Bottom View