User Guide

NPL-4/5
System Module and User Interface Nokia Customer Care
Page 32 Copyright © 2004 Nokia Corporation. All rights reserved. Issue 1 05/04
VR1A can be enabled or disabled. VR2 can be enabled or disabled and its output voltage
can be programmed to be 2.78V or 3.3V. VR4 -VR7 can be enabled, disabled, or forced
into low quiescent current mode. VR3 is always enabled in Active mode.
Table 17: Regulator Controls
Sleep mode
Sleep mode is entered when both MCU and DSP are in stand–by mode. Both processors
control sleepmode.
Regulator NOTE
VFLASH1 Enabled
Controlled by register writing
Default state is off.
Controlled by register writing.
Defaul start up setting 1.8V
VAUX3 Controlled by register writing.
Enabled
Disabled in sleep mode
VIO Enabled
VCORE Enabled
VSIM Controlled by register writing.
Controlled by register writing
Disabled in sleep mode
Controlled by register writing
Disabled in sleep mode
Enabled
Disabled in sleep mode
Enabled
Disabled in sleep mode
Enabled
Disabled in sleep mode
Enabled
Disabled in sleep mode
Enabled
Disabled in sleep mode
IPA1 Controlled by register writing.
IPA2 Controlled by register writing.
IPA3 Controlled by register writing
VCAMDIG and
VANA_EXT
External regulators are controlled by
GenIO(01)
VR6
VR7
VR2
VR3
VR4
VR5
VAUX2
VAUX1
VANA
VR1A/VR1B