User Guide

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NSE–1

System Module UP8S

Original 03/98

3/A3–S1

Block Diagram of System/RF Blocks

Summary of content (12 pages)

PAGE 1
System Module UP8S NSE–1 Block Diagram of System/RF Blocks Original 03/98 3/A3–S1
PAGE 2
System Module UP8S Circuit Diagram of Baseband Original 03/98 NSE–1 (Version 9 Edit 64) for layout version 09 3/A3–S2
PAGE 3
System Module UP8S Circuit Diagram of Power Supply (Version 9 Original 03/98 NSE–1 Edit 216) for layout version 09 3/A3–S3
PAGE 4
System Module UP8S Circuit Diagram of SIM Connectors (Version 9 Original 03/98 NSE–1 Edit 54) for layout version 09 3/A3–S4
PAGE 5
System Module UP8S Circuit Diagram of CPU Block (Version 9 Original 03/98 NSE–1 Edit 155) for layout version 09 3/A3–S5
PAGE 6
System Module UP8S Circuit Diagram of Audio Original 03/98 NSE–1 (Version 9 Edit 115) for layout version 09 3/A3–S6
PAGE 7
System Module UP8S Circuit Diagram of IR Module (Version 9 Original 03/98 NSE–1 Edit 93) for layout version 9 3/A3–S7
PAGE 8
System Module UP8S Circuit Diagram of RF Block (Version Original 03/98 NSE–1 9 Edit 187) for layout version 09 3/A3–S8
PAGE 9
System Module UP8S User Interface Connector (Version 9 Original 03/98 NSE–1 Edit 75) for layout version 9 3/A3–S9
PAGE 10
System Module UP8S NSE–1 Layout Diagram of UP8S – Top (Version 09) testpoint ref name condition dc–level J102 FBUS_RX power on pulsed DC (0V/2.8V) J103 MBUS power on pulsed DC (0V/2.8V) J107 LGND J110 VPP flash programming nominal 5V (5V flash) or 3.0V (3V flash) J111 WDDISX power on reset state 0V, normal state 2.8V J221 5V flash programming nominal 5.0V (5V flash) or 3.0V (3V flash) J222 DSPXF power on pulse active 0V, non–active 2.8V J224 VCOBBA active state nominal 2.
PAGE 11
System Module UP8S condition dc–level NSE–1 testpoint ref name J516 VSYN_1 ( regulated supply for VCOs) 2.8 V min 2.7 / max 2.85 V J518 VREF_2 ( ref. voltage for N500 ) 1.5 V +/– 1.5% J520 AFC ( autom. freq. cntrl ) 0 – 2.3 V, typ. 1.15 V ( room temp. ) J522 VXO ( regulated supply for VCTCXO ) 2.8 V min 2.7 / max 2.85 V J530&J532 71 MHz IF input to N620 –95 dBm @ X540 (ext. RF connector ) typ. ca. 1.
PAGE 12
System Module UP8S NSE–1 testpoint ref name condition dc–level J251 AGND pcb ground 0V J256 COBBADAX active state pulse active 0V, non–active 2.8V J500 Control voltage for UHF VCO module G600 channel 60 channel 1 channel 124 2.25 +/– 0.25 V > 0.8 V < 3.7 V J504 Control voltage for VHF VCO circuit typ. 2.0 –2.2 V min 0.5 / max 4.0 V J508 VSYN_2 ( regulated supply for PLLS ) 2.8 V min 2.7 / max 2.85 V J534&J536 13 MHz IF output to N250 –95 dBm @ X540 (ext.