User Guide

CCS Technical Documentation System Module and User Interface

NPM-6/6X

Issue 2 06/03 Nokia Corporation. Page 35

Memory Block

For the MCU the UPP includes 2 kbytes ROM, that is used mainly for boot code of MCU.

To speed up the MCU operation small 64 byte cache is also integrated as a part of the

MCU memory interface. For program memory 8Mbit (512 x 16bit) PDRAM is integrated.

RAM is mainly for MCU purposes but also DSP has also access to it if needed.

MCU code is stored into external flash memory. Size of the flash is 64Mbit (4096 x

16bit).

Security

The phone flash program and IMEI codes are software protected using an external secu-

rity device that is connected between the phone and a PC.

Clock distribution

Figure 12: Clock Distribution Diagram

UPP

CTSI

UEM

VCTCXO

26MHz

HELGA

PLL

MCU

DSP

SLICER

VR3

26 MHz

32 kHz

SLEEPX

32 kHz

RFBUSCLK 13MHz

CBUSCLK 1MHz

DBUSCLK 13MHz

LCDCLK max. 6.5MHz

SIMCLK max. 3.25MHz