User Guide

CCS Technical Documentation System Module Schematics NPM-6/6X
Issue 2 06/03 Nokia Corporation Page A-31
Table 2: TEST POINTS
Signal Test point Function Characteristics Note
FBUSTXO PRODTP2 Flash programming data
and phone control
2.78V digital signal
From phone to FPS-8/PC
FBUSRXO PRODTP3 Flash programming data
and phone control
2.78V digital signal From FPS-8/PC to phone
VPP PRODTP6 Flash programming voltage 1.8V internal voltage
12V external voltage
MBUS PRODTP7 Flash programming clock
and phone control
2.78V digital signal
6.5 MHz max.
Bi-directional phone
control
BSI J101,J102
or battery
connector
Battery size indicator
Local mode indicator
SIM removal indicator
Flash programming start
signal
1V in normal mode
0V in local mode
If BSI line rises > 2.1V
2.78V BSI pulse
To UEM A/D converter
BTEMP R157/R203 Battery temp. indicator
Test mode indicator
About 0.8V at 25°C
0V in test mode
SIMDATA J386 SIM data Digital signal
1.8 / 3V
From / to UEM / SIM card
SIMRST
J387
SIM reset
Digital signal
1.8 / 3V
From UEM to SIM card
SIMCLK
J388
SIM clock
3.25MHz digital clock
signal
1.8 / 3V
From UEM to SIM card
VSIM J389 Power supply for SIM card 1.8V or 3V Depends on the SIM card
PURX J402 Power up reset 1.8V digital signal From UEM to UPP
SLEEPX J403 Sleep mode control signal
1.8V when not in sleep
0V when in sleep mode
SLEEPCLK J404 Sleep mode timing clock 32.768kHz digital clock
1.8V
UEMINT J405 Interrupt request for UPP
1.8V digital signal From UEM to UPP
CBUSCLK J406 Serial control bus clock 1MHz digital clock
signal 1.8V
From UPP (MCU) to
UEM
Controlled by MCU
CBUSDA J407 Serial control bus data
input/output
1.8V digital signal Between UPP (MCU) and
UEM
Controlled by MCU
CBUSENX J408 CBUS enable signal 1.8V digital signal From UPP (MCU) to
UEM
Controlled by MCU
Signal Test point Function Characteristics Note
RFBUSDA J509 HELGA control serial data 1.8V digital signal From UPP to HELGA
RFBUSCLK J501 HELGA control clock 26MHz digital clock
signal 1.8V
From UPP to HELGA
RFBUSEN1 J502 HELGA chip select and
latch enable
1.8V digital signal From UPP to HELGA
RFBUS
reset
(GENIO6)
J503
Helga chip reset 1.8V digital signal
From UPP to HELGA
RFCLK
R420
System clock for baseband 26MHz analog clock
signal > 300mVpp
From HAGAR to UPP
RESX
J306
LCD reset 1.8V digital signal
From UPP to LCD driver
CSX J304 LCD chip select
1.8V digital signal From UPP to LCD driver
SDA
J305
LCD serial data
1.8V digital signal From UPP to LCD driver
SCLK J307 LCD clock 3.25MHz digital clock
signal 1.8V
From UPP to LCD driver
VDDI J301
Supply voltage (driver) 2.78V =VFLASH1
VDD J300
Supply voltage (logic) 1.8V =VIO
VLED+ J303
Supply voltage for display
LEDs
Min. 7.0V,typ 7.3V max.
8.4V
VLED- J302
Return current for VLED+ GND
Display GND J308
Ground
MBUSTX J409
MBUS from UPP to UEM 1.8V digital signal
MBUSRX J410 MBUS from UEM to UPP 1.8V digital signal
FBUSTX
J411 FBUS from UPP to UEM 1.8V digital signal
FBUSRX J412 FBUS from UEM to UPP 1.8V digital signal
DBUSCLK J413 DBUS clock 13MHz digital clock
signal 1.8V
From UPP (DSP) to UEM
Generated by UPP
DBUSDA J414 DBUS data input/output 1.8V digital signal Between UEM and UPP
(DSP)
DBUSEN1X J415 DBUS selection and
enable
1.8V digital signal From UPP (DSP) to UEM
EXTWRX J416 Flash memory write enable 1.8V digital signal
EXTRDX J417 Flash memory read enable 1.8V digital signal
FLSCLK J419 Flash memory clock 35MHz digital clock
signal 1.8V
In burst mode
FLSCSX J420 Flash memory chip select 1.8V digital signal
Signal Test point Function Characteristics Note
Charge J113 Charging voltage Max. 16V For production
ChargeGND J112 Charging GND Ground For production
EARP J310 Earpiece audio, diff. From UEM
EARN J311 Earpiece audio, diff. From UEM
FMCtrlDa J356 FM radio control data 1.8V digital signal From UPP to TEA5767
GENIO(12)
FMCtrlClk J357 FM radio control clock 1.8V digital signal From UPP to TEA5767
GENIO(11)
FMWrEn J358 FM radio enable 1.8V digital signal
FMClk J359 FM radio system clock 1.8V digital signal,
32kHz
From UPP to TEA5767
GENIO(3)