User Guide

RH-21 Company Confidential
System Module Nokia Customer Care
Page 10  2004 Nokia Corporation. Issue 2 07/2004
Asic according to control messages from the UPP. The buzzer and an external vibra alert
control signals are generated by the UEM with separate PWM outputs.
UI Drivers
There are discrete drivers for the MIDI speaker and keyboard LEDs. The drivers for vibra
and display are inside UEM.
AD Converters
There is an 11-channel analog-to-digital converter in UEM. The AD converters are cali-
brated in the production line.
UPP8M
RH-21 uses UPP8M ASIC. The RAM size is 8M. The UPP ASIC is designed to operate in a
DCT4 engine. The UPP processor architecture consists of both DSP and MCU processors.
Blocks
UPP is internally partitioned into two main parts:
The Processor and Memory System (i.e., Processor cores, Mega-cells, internal memories, periph-
erals, and external memory interface). This is known as the Brain.
The Brain consists of the blocks: the DSP Subsystem (DSPSS), the MCU Subsystem
(MCUSS), the emulation control (EMUCtl), the program/data RAM (PDRAM) and the
Brain Peripherals–subsystem (BrainPer).
The NMP custom cellular logic functions. This is known as the Body.
The Body contains all interfaces and functions needed for interfacing other DCT4 base-
band and RF parts. Body consists of following sub-blocks: MFI, SCU, CTSI, RxModem,
AccIF, UIF, Coder, GPRSCip, BodyIF, SIMIF, PUP, and CDMA (Corona).
Flash Memory
Introduction
The RH-21 tranceivers use a 64-Mbit flash as its external memory. The VIO regulator is
used as a power supply for normal in-system operation. An accelerated program/erase
operation can be obtained by supplying Vpp of 12 volt to the flash device.
The device has two read modes: asynchronous and burst. The Burst read mode is utilized
in RH-21, except for the start-up, when the asynchronous read mode is used for a short
time.
In order to reduce the power consumpition on the bus, a Power Save function is intro-
duced. This reduces the amount of switching on the external bus.