User Guide

PAMS Technical Documentation System Module & UI
NHM-8NX
Issue 1 05/02 ãNokia Corporation Page 49
than the one being erased or programmed. An erase suspend allows system software to
pause an erase so it can read or program data in another block, and a program suspend
allows system software to pause programming so it can read (no erase possible) from
other locations within that partition.
AMD
The device can perform simultaneous read-while-write or read-while-erase in different
partitions. The AMD device only has the erase suspend feature. It can also suspend an
erase in Partition A and start writing to another block in Partition A. It resumes erase
once the write is completed. It is however, not possible to suspend an erase in partition B
for writing to another block in this partition.
Timing
Address access time is equal to delay from stable addresses to valid output data. In
actual operation it is a fixed number of clock cycles programmed by the SW and depen-
dent on the CLK Frequency.
The chip enable access time is the delay from the stable addresses and stable CE# to
valid data at the output pins.
The output enable access time is the delay from the falling edge of the OE# to valid data
at the output.
Both flashes have a 40 MHz clock rate.
Intel
Some of the more important timing Specifications for the Intel flash are: