User Guide

PAMS Technical Documentation System Module & UI
NHM-8NX
Issue 1 05/02 ãNokia Corporation Page 45
AMD
The AMD device has similar signals to the Intel device with a few minor differences in
the naming conventions as listed below. Also, the AMD device uses one additional signal,
PS. This pin is not connected on the Intel device.
Figure 15: Intel-AMD signal deviations description
Power Save Feature
Intel
The Intel device has two power saving features: Automatic Power Savings (APS) and
standby mode. The device automatically enters APS mode following read cycle comple-
tion. Standby mode is initiated when the device is deselected by driving CE# high, sub-
stantially reducing device power consumption. RST# low also resets the device and puts
it in asynchronous read array mode, provides write protection and clears the status reg-
ister. These two features combined, significantly reduce the power consumption.
AMD
This feature is currently not activated in the hardware configuration software, therefore
the AMD PS feature is not used at all. Gemini tests have shown the benefits offered by this
feature to be rather marginal.
The AMD device implements the standby mode similar to Intel, but uses a designated sig-
nal (PS, IN/OUT) to reduce the number of switchings and thus, the power consumption,
on the MEMADDA[23:0] bus.
Vpp Pwr Erase and Program Power: A valid voltage on this pin (see above) allows block erase or
data programming. For in-system (user mode) read, program and erase, Vpp=Vcc.
Vpp=12 V for flashing during production. Extended use of 12V on this pin however,
could damage the block cycling capability. Additionally Vpp serves as write protect if
kept low.
Vcc Pwr Device power supply
VCCQ Pwr Output Power Supply: Enables all outputs to be driven at VCCQ. This input may be tied
directly to Vcc.
VSSQ Pwr I/O Ground: Should be tied to GND
GND Pwr Ground
Symbol Type Description
RDY O Ready/Busy Output: Similar function as WAIT in the Intel device. Indicates the status of
the read. RDY-low indicates that device is busy and the controller should add wait states.
RDY-high indicates the device is ready for a read operation.
PS I/O Power Save Signal: Indicates whether the bus data should be inverted at the receiving
end. When in input mode, if high, bus data should be inverted in the flash. When high in
output mode, the bus output data should be inverted in the UPP registers. This signal has
no equivalent in the Intel device.
RP# I Hardware Reset Input: Same function as the RST# signal in the Intel device.