User Guide

NHM-8NX
System Module & UI PAMS Technical Documentation
Page 10 ãNokia Corporation Issue 1 05/02
LCD
Table 11: LCD connector interface
XAUDIO[1]
Filtered signal
UEM, HF No
direct con-
nection
between
UEM and
LM4890
LM4890 Output Swing 1.0 - Vpp with 60 dB
signal to total
distortion
ratio
VBAT Battery LM4890
(p. 6)
Supply 3.1 4.2 V Lower limit is
SW cut-off
Pin Signal
NMP
net
Symbol Parameter Min.
Ty
p.
Max.
Un
it
Notes
1 /RES XRES Reset - - 0.3 x V
DDI
V Logic Low,
active
t
rw
1000 - - ns For valid reset
2 /SCE XCS Chip Select 0.7 x V
DDI
- - V Logic High
- - 0.3 x V
DDI
V Logic Low,
active
t
S2
60 - - ns Setup time
t
H2
100 - - ns Hold time
3 VSS VSS GND Ground - 0 - V
4 SDATA SDA Input 0.7 x V
DDI
- - V Logic High
- - 0.3 x V
DDI
V Logic Low
Output @
I
OL
= 0.5mA,
I
OH
= -
0.5mA
0.7 x V
DDI
- - V Logic High
- - 0.3 x V
DDI
V Logic Low
t
s1
100 - - ns Data setup time
t
H1
100 - - ns Data hold time
5 SCLK SCLK Serial clock
input
0.7 x V
DDI
- - V Logic High
- - 0.3 x V
DDI
V Logic Low
t
cyc
153,8 - - ns Serial clock
cycle (max. 4
MHz)
t
PWH1
50 - - ns Serial clock high
pulse width