User Guide

CCS Technical Documentation Company Confidential Schematics / Layouts NEM-2 NEM-1
Issue 1 07/03 Copyright Nokia 2003. All rights reserved. Page A-20
Discrete power management
D
C
B
A
D
Capacitors located in REG_CAP sub-block
C
B
A
Connected through REG_CAP sub-block
R1011 (Hollywood)
em21_09
Used refs in REG_CAP: C238, C200, C219, C233, C221 and R205
"Both 0603 and 0805 size 1uF capacitors used !"
C215
GND
GND
VR1A
1u0
C207
1u0
4k7
4k7
R206
R207
capacitors
REG_CAP
CCN
CCP
SIMIODA_IN SIMIODA_OUT
VPUMP
VBATT4
1
2
C209
VREFRF01
GND
GND
VBATT6
10p
1u0
C232
VBAT
VFLASH1
GND
0
1
VCORE
C241
GND
GND
GND
VBATT2
1n0
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
em21_09
Assoc
Discrete Power Management
Name
ArKa
dd-mmm-yy
08-Jul-97
11-Jun-03MOLLENHA
Appr
Des.
Dr.
C208
1u0
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
VBATT6
VBATT3
GND
GND
100n
C218
543210
VBATT1
VFLASH2
1u0
C235
0
1
2
3
4
5
6
VBATT1
GND
VBATT5
VR4
GND
GND
C206
1u0
GND
IPA2
GND
GND
1u0
C213
C205
10
GND
1u0
C222
1u0
0
10n
C220
100n
C236
54321
VR6
GND
1u0
C229
GND
7
6
5
4
GND
1u0
C201
GND
GND
VBATT4
VBATT1
432
GND
1u0
C224
empty
DC_DC
GENIO(31:0)
G_POWER(11:0)
SMPSCLK
UEMRSTX
VCORE
VCORE_LIN
VREF
302931
1u0
C203
GND
1u0
C204
210
ISET
GND
10n
C202
GND
0
1
2
VBATBB1
P8
P9
VCHARIN2
GND
0
1
2
P13
VBATVR1
P14
VR1A
P2
OSCOUT
P3
VBACK
PWM1C
P4
P5
FBUSRXO
SIMCARDDET
P6
PWRONX
P7
N6
N7
HOOKINT
VANA
N8
VBATBB2
N9
P1
OSCIN
P10
VCHAROUT2
VFLASH2
P11
CCP
P12
N11
VBATBB3
GNDVR1
N12
N13
VPUMP
N14
VBATBB4
VDAAUD2
N2
VRTC
N3
IRLEDC
N4
FBUSTXO
N5
HEADINT
M4
CHDISX
M5
M6
MBUS
M7
PWMO
VFLASH1
M8
VCHARIN1
M9
XEAR
N1
VCHAROUT1
N10
EARN
M1
VBATREGS
M10
M11
CCN
VR1B
M12
VCORE
M13
M14
VBATVR2
M2
EARP
M3
VSAAUD1
OSCCAP
L13
VR6
VBATVR7
L14
L2
HFCM
L3
VSAAUD2
IRRXN
L4
L5
GNDFLASH1
L6
VCHARINK
L9
VCHAROUTK
K13
VBATVR5
VR4
K14
K2
MIC3P
MICSUB
K3
VDAAUD1
K4
L1
HF
L10
GNDREGS
L11
VBATVR6
VR2
L12
MIC2N
J4
J6
GNDTH13
J7
GNDTH14
GNDTH15
J8
J9
GNDTH16
K1
MIC3N
VBATVR4
K11
VR7
K12
GNDTH11
GNDTH12
H9
MIC1N
J1
J11
VR5
J12
VR3
J13
VBG
VBATVR3
J14
MIC1P
J2
MIC2P
J3
H1
MICB1
H12
VREF278
VREFRFO1
H13
H14
VREFRFO2
H2
MICBCAP
MICB2
H3
H6
GNDTH9
GNDTH10
H7
H8
G12
ISET
VREF25RF
G13
G14
VREF25BB
BUZZO
G2
G3
VIBRA
GNDTH5
G6
GNDTH6
G7
GNDTH7
G8
GNDTH8
G9
F14
IPA1
VBATDRIV
F2
KLIGHT
F3
F4
VSADRIV1
GNDTH1
F6
F7
GNDTH2
GNDTH3
F8
GNDTH4
F9
VSADRIV2
G1
TXQOUTP
E14
CALLED2
E2
VCXOTEMP
E3
E4
TXPWRDET
DLIGHT
F1
VDACONVTX
F11
VSACONVTX
F12
F13
IPA2
D3
BTEMP
D4
PATEMP
D5
TESTMODE
MBUSRX
D6
D9
SLEEPCLK
E1
CALLED1
TXIOUTP
E11
E12
TXQOUTN
AUXOUT
E13
CBUSENX
VSS
C9
D1
KEYB1
D10
DBUSCLK
D11
AUXD
RXQINP
D12
AFCOUT
D13
TXIOUTN
D14
D2
KEYB2
C13
RXIINP
RXQINN
C14
BSI
C2
C3
VSIM
VDD28
C4
C5
SIMIOCTRL
MBUSTX
C6
FBUSRXI
C7
C8
EARDATA
B6
CBUSDA
B7
B8
IRTX
IRRX
B9
C1
LS
PURX
C10
RXID
C11
VSACONVRX
C12
SLEEPX
B11
B12
TXQD
B13
VDACONVRX
RXIINN
B14
SIMIODAO
B2
SIMCLKO
B3
B4
SMPSCLK
B5
SIMIODAI
A4
UEMRSTX
A5
SIMCLKI
A6
MICDATA
A7
FBUSTXI
CBUSCLK
A8
VDD18
A9
B1
VIO
B10
DBUSENX
A1
VBATBB5
UEMINT
A10
A11
DBUSDA
A12
TXID
A13
RFCONVCLK
RXQD
A14
SIMRST
A2
VSIMGND
A3
3
GND
GND
UEMK_V4.4_WDOGS_ENABLED
D200
VR2
VANA
GND
0
1
2
light
PWRFILTER
VBATIN
VBATTO_1
VBATTO_2
VBATTO_3
VBATTO_4
VBATTO_5
VBATTO_6
VANA
GND
2
1
0
GND
1n0
C242
C234
C212
1u0
1u0
8
9
VR3
C228
1u0
32.768kHz
B200
GND
210
VFLASH1
GND
VR5
GND
VFLASH1
R200
1210
VIO
GND
GND
C223
1u0
VANA
1u0
C243
VR1B
GND
VBATT3
VBAT
GND
C225
1u0
3210
3
4
GND
C239
100n
VBAT
0
1
2
VSIM
VIO
0
1
2
3
4
GND
VANA
VANA
5
7
VR7
C210
10p
0
1
2
3
VBATT2
GND
VANA
10n
C240
1u0
C211
1u0
C226
C214
1u0
4x100k
1u0
C230
R202
56
VBACK
9
8
IPA1
34
GND
C231
1u0
C227
1u0
GND
1
0
VBATT5
0
2
1
C237
100n
GENIO(31:0)
VCORE_LIN
VCORE_LIN
GENIO(31:0)
SIM2MMCIF(3:0)
GPIO(31:0)
GENIO(31)
IRIF_I(1:0)
AGND(2:1)
AGND1
AGND2
AGND1
G_POWER(11:0)
AGND2
XAUDIO(17:0)
AGND2
AGND1
RFCONVDA(5:0)
IACCDIF(5:0)
AUDIODATA(3:0)
AUDIO(6:0)
PUSL(3:0)
UIDRV(5:0)
IRIF(2:0)
ACCDIF(2:0)
RFAUXCONV(2:0)
CHARGER(4:0)
AGND2
PWRONX
SLOWAD(6:0)
RFCONV(9:0)
SIMIF(3:0)
AUDUEMCTRL(3:0)
RFCONVCTRL(2:0)
AGND2