User Guide

PAMS
Technical Documentation
NSE–8/9
System Module
Page 2– 86
Issue 1 07/99
When the transceiver is in sleep mode and ”wakes” up to receive mode,
there is only about 5 ms for the AFC-voltage to settle. When the first burst
arrives the system clock has to be settled to +/- 0.1 ppm frequency
accuracy. The VCTCXO-module requires about 4 ms to settle into the final
frequency. The amplitude rises to maximum in about 3 ms, but because
the frequency–settling time is higher, the oscillator must be powered up
early enough to avoid frequency errors.
Interfacing
The interfacing between RF and BB is comprised of the signals stated in
the following diagrams and tables.
RX:
Figure 25. Receiver Interface