User Guide

PAMS
Technical Documentation
NSE–8/9
System Module
Page 2– 59
Issue 1 07/99
MAD2PR1
RAM Flash Rom
EEProm
16K x 8
128k x 8
1M x 16
MCUDa(7:0)
MCUDa(15:8)
MCUGenIODa(7:0)
MCUAD(20:1)
MCUAD(16:0)
MCUAD(20:0)
ExtMCUDa(7:0)
MCURdX
MCUWrX
RAMSelX
ROM1SelX
CS
CS
WE WE
OEOE
MCUGenIO1
WP
SCL
Clock
Data
MCUGenIO4
SDA
WC
MCUGenIO3
MCUGenIO0
ESysResetX
ESysResetX
CS RPVpp
R307
Figure 16. Memory Setup
Inside MAD2PR1 the memory interfacing is controlled by the
BusController block, BusC, in the system logic. Based on signals from the
MCU core the BusC generates chip selects for the address lines, number
of wait states for memory access,and read write strobes. The
BusController controls MCU access to the internal MAD2PR1 system logic
memories
The HD947 MCU memory requirements are shown below
Table 31. HD947 Memory Requirements
Device Organiza-
tion
Ac-
cess
Time
ns
Wait
States
Used
Remarks
FLASH 1024kx16 110 1 uBGA48
SRAM 128kx8 120 1 Shrink TSOP32
EEPROM 16kx8
serial
IIC SO8
SRAM Memory
The MCU work memory is a static ram of size 128kx8 in a Shrink TSOP32
package. The work memory is supplied from the common Baseband VBB
voltage and the memory contents are lost when the Baseband voltage is
switched off. All retainable data should be stored into the EEPROM (or
FLASH) when the phone is powered down.