User Guide

PAMS
Technical Documentation
NSE–8/9
System Module
Page 2– 54
Issue 1 07/99
Vdc_out voltage
Table 30. Switcher output voltage, ADC properties
Parameter min typ max Unit Comment
Resolution 10 bits 1024 ADC output values
Conversion error 13 mV corresponding to +/– 2 LSB
Vdc_out range 0 6.5 V range given by Vdc_out over
voltage protection
Vdc_out voltage @ADC
saturation
6.52 6.65 6.78 V ADC reading 1023
Vdc_out resolution 6.4 6.5 6.6 mV/bit
Vbat_adc range 0.1 Vbat-
max
V Vbat_max =6.65V +/– 2.0%
min limit due to CCONT
Un–calibrated ADC read-
ing
618 631 644 @ Vdc_out = 4.1V
Digital Part
The Baseband functions are controlled by the MAD2PR1 asic, which
consists of MCU, system logic and DSP, all integrated into one common
asic.
MAD2PR1 system ASIC
MAD2PR1 contains following building blocks:
– ARM RISC processor with both 16–bit instruction set (THUMB mode) and
32–bit instruction set (ARM mode)
– TMS320C542 DSP core with peripheral:
– API (Arm Port Interface memory) for MCU–DSP communication,
DSP code down load, MCU interrupt handling vectors (in DSP
RAM) and DSP booting
– Serial port (connection to PCM)
– Timer
– DSP memory
– BUSC (BusController for controlling accesses from ARM to API, System
Logic and MCU external memories, both 8– and 16–bit memories)
– System Logic
– CTSI (Clock, Timing, Sleep and Interrupt control)
– MCUIF (Interface to ARM via B
USC). Contains MCU BootROM
– DSPIF (Interface to DSP)
– MFI (Interface to COBBA_GJP AD/DA Converters)
– CODER (Block encoding/decoding and A51&A52 ciphering)