User Guide

CCS Technical Documentation System Module
RH-48
Issue 1 11/2003 Confidential ©2003 Nokia Corporation Page 7
Table 1: PDM Interface
Signal name From To Parameter Min Typ Max Unit Function
RX_IF_AGC UPP
GenIO 9
Yoda Voltage Min
Max
----------------
Clk Rate
(1)
0.0
1.75
--------
1.8
------
9.6
0.1
1.86
-------
19.2
V
--------
MHz
Controls gain of VGA r
in receiver
TX_IF_AGC UPP
GenIO 7
Jedi Voltage Min
Max
----------------
Clk Rate
(1)
0.0
1.75
-------
1.8
-------
9.6
0.1
1.86
--------
19.2
V
--------
MHz
Controls gain of VGA in
IF VGA
TX_RF_AGC UPP
GenIO 26
Jedi Voltage Min
Max
----------------
Clk Rate
(3)
0.0
1.75
--------
1.8
--------
9.6
0.1
1.86
--------
19.2
V
--------
MHz
Controls gain of TX
driver
Table 2: General I/O Interface
Signal
name
From To Parameter Input characteristics Function
TX_Gate UPP
Gen IO 8
pullup
Jedi and PA
Gating
Transistors
“0” Transmitter Off
“1” Transmitter On
Timing Accuracy
1.38 1.88 V
0 0.4 V
4 chips, and can be up to
a total of 255 chips
Punctures the PA’s and the
Jedi ASIC
Digital Into RF
D0 UPP
Gen IO 10
PMIC Voltage Min
Max
0.4V max
1.72V-1.86V
Enable PMIC
D1 UPP
Gen IO 13
PMIC Voltage Min
Max
0.4V max
1.72V-1.86V
Set PMIC output voltage
D2 UPP
Gen IO 12
PMIC Voltage Min
Max
0.4V max
1.72V-1.86V
Set PMIC output voltage
Table 3: VCTCXO Interface
Signal name From To Parameter Min Typ Max Unit Function
19.2M_UPP Yoda UPP Frequency
------------------------
Signal amplitude
-------
0.5
19.2
-------
1.0
-------
1.5
MHz
-------
-
Vpp
High stability clock
signal for logic cir-
cuits, AC coupled
sinewave.
AFC UEM VCTCXO Voltage Min
Max
-------------------------
Settling time
(4)
0.0
2.4
------- -------
0.1
2.55
-------
0.2
V
-------
ms
Automatic fre-
quency control signal
for VCTCXO
Digital Into RF