User Guide

TME-3 Company Confidential
Data Module RL7 PAMS Technical Documentation
Page 26 Nokia Corporation. Issue 4 12/03
by 2 or by 4 depending on system mode. There are separate outputs one for EGSM and
one for GSM1800.
In EGSM branch there is a SAW filter before PA to attenuate unwanted signals and wide-
band noise from the Hagar IC.
The final amplification is realized with dual band power amplifier. It has two different
power chains one for EGSM and one for GSM1800. PA is able to produce over 2 W (0
dBm input level) in EGSM band and over 1 W (0 dBm input level) in upperband band into
50 ohm output. Gain control range is over 45 dB to get desired power levels and power
ramping up and down.
Any harmonics generated by the PA are filtered out with filtering in side the antenna
switch -module.
Power control circuitry consists of discrete power detector (common for lower and
upperband) and error amplifier in HAGAR. There is a direction al coupler connected
between PA output and antenna switch. It is a dual band type and has input and outputs
for both systems. Directional coupler takes a sample from the forward going power with
certain ratio. This signal is rectified in a schottky-diode and it produces a DC-signal after
filtering.
The possibility to improve efficiency in low power levels has been specified in power
amplifier module. The improved efficiency will take place on power level 7 and lower in
EGSM. For this option there is control input line in PA module.
AFC function
AFC is used to lock the transceivers clock to frequency of the base station. AFC-voltage is
generated in BB with 11 bit DA-converter. There is a RC-filter in AFC control line to
reduce the noise from the converter. Settling time requirement for the RC-network
comes from signalling, how often PSW (pure sine wave) slots occur. AFC tracks base sta-
tion frequency continuously, so transceiver has a stable frequency, because changes in
VCTCXO-output don't occur so fast (temperature).
Settling time requirement comes also from the start up-time allowed. When transceiver
is in sleep mode and "wakes" up to receive mode, there is only about 5 ms for the AFC-
voltage to settle. When the first burst comes in system clock has to be settled into +/-
0.1 ppm frequency accuracy. The VCTCXO-module requires also 5 ms to settle into final
frequency. Amplitude rises into full swing in 1... 2 ms, but frequency settling time is
higher so this oscillator must be powered up early enough.
DC-compensation
DC compensation is made during DCN1 and DCN2 operations (controlled via serial bus).
DCN1 is carried out by charging the large external capacitors in AGC stages to a voltage
which cause a zero dc-offset. DCN2 set the signal offset to constant value (RXREF 1.35
V). The RXREF signal is used as a zero level to RX ADCs.