User Guide
Baseband description
Functional description
The BB core is based on UPP8M CPU. UPP8M takes care of all the signal processing and operation controlling
tasks of the mobile device. For power management, there is one main ASIC for controlling charging and
supplying power Liteplus plus a discrete power supply. The main reset for the system is generated by the
Liteplus. The memory comprises of 256 Mbit flash and 32 Mbit PsRAM. memory devices that are stacked on
top of each other in a single Combo package.
The interface to the RF and audio sections is also handled by the Liteplus. This ASIC provides A/D and D/A
conversion of the in-phase and quadrature receive and transmit signal paths and also A/D and D/A conversions
of received and transmitted audio signals. Data transmission between Liteplus and RF and the UPP8M is
implemented using different serial connections (CBUS, DBUS and RFBUS). Digital speech processing is handled
by UPP8M ASIC.
A real time clock function is integrated into Liteplus, which utilizes the same 32 kHz-clock source as the sleep
clock. The SLCK/RTC runs all time when the phone battery is connected. It is running also when the phone is
switched off. In Liteplus there is no back up battery/capacitor connection.
There are three audio transducers in the product; 16 mm speaker, an earpiece and a microphone. The earpiece
is used to generate audios for earpiece; the speaker is used to generate audios for IHF and ringing tones. A
separate audio amplifier drives the speaker. There is only one microphone for both HS and IHF modes.
The display is an TFT type color display with 65536 colors and 128 x 160 pixels with backlighting. The keypad
module features a function keymat with a 4-way navigation key with a center selection key.
UPP
UPP (Universal Phone Processor) is the digital ASIC of the DCT4 generation base band. UPP8M includes 4.5
MBit internal RAM, 16/32-bit RISC MCU core. UPP8Mv6.4 includes ARM7TDMI rev4 16/32-bit RISC MCU core, TI
Lead3 16-bit DSP phase2+ core with DMA controller, ROM for MCU boot code and all digital control logic.
Memory
This mobile uses two kinds of memories, Flash and PSRAM. These memories have are sharing the same bus
interface to UPP8M. SDRAM is used as the working memory. The PSRAM size is 32 Mbits.
PSRAM I/O is 1.8 V and core 1.8 V supplied by LitePlus regulator VIO. All memory contents are lost if the supply
voltage is switched off.
Multiplexed flash memory interface is used to store the MCU program code and user data.
Configuration of flash memory is a 256 Mbit NOR flash memory. Flash I/O and core voltage are 1.8 V.
Liteplus
The Liteplus is a low cost energy management ASIC contains for BB use two 2.78V LDO regulators, 1.8V linear
regulator, programmable 1.0 - 1.5 V linear regulator and 1.8/3.0 V LDO regulator. For RF use Liteplus has five
2.78 V LDOs. In addition, the Liteplus contains audio codec, A/D converters, RF converters, many drivers, etc.
External regulators
White LED Driver solution is implemented with DC/DC converter. The driver circuit is controlled by Liteplus
output pin KDLIGHT.
RM-512; RM-513; RM-514; RM-515; RM-543
System Module
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