User Guide

PAMS
System Module DB6
NHB–3
Technical Documentation
Original 26/97
Page 4–35
The ASIC takes care of the interface between the DSP and the RFI: TX modu-
lator, RX filter, TX and RX sample buffers and controlling state machine. The
interface to RFI is done using 12 bit data bus, 4 bit address bus, RDX and
WRX. There is data acknowledge (DAX) from RFI to ASIC. Also in this block
are the serial RF synthesizer interface (SCLK, SDAT) and the digital RF control
signals (RXPWR, TXPWR, TXP, SYNTHPWR).
Main Components
D2CA ASIC
RFC buffer
– Inverter buffer stage is used as a buffer for the VCTCXO clock.