User Guide

PAMS
System Module DB6
NHB–3
Technical Documentation
Original 26/97
Page 4–19
Block Description
MCU – Memories:
The MCU has a 20 bits wide address bus A(19:0) and an 8–bit data
bus with memories. The address bits A(19:16) are used for chip se-
lect decoding. The decoding is done in the D2CA ASIC. The ASIC
can address two 4 Mbit (or smaller) or one 8 Mbit flash memories.
Hitachi HD647536 processor has 60kbyte internal ROM and 2kbyte
RAM memories. One wait state is used in flash memory access.
Flash programming
In flash programming a special flash programming box and a PC is
needed. Loading is done through the bottom connector of HP; multi-
plexed with HOOK_RXD2 and PHFS_TXD2 line. First MCU goes to
minimum mode (MBUS command from PC or if MBUS is connected
to MIC_JCONN line in power up). Then the flash software is loaded
from PC to flash loading box. When the loading is complete flash
loading to HP can be started by MBUS command from PC to the
MCU. After that the MCU asks the test box to start flash loading to
HP. The box supplies 12 V programming voltage for flash and starts
to send 250 bytes data blocks to the MCU via HOOK_RXD2 line.
The baud rate is 406 kbit/s. The MCU calculates the check sum,
sends acknowledge via PHFS_TXD2 line and sends the data to
flash. When all the data is loaded the HP makes reset and tells the
flash loading box if the loading was succeeded or not. Only PSL+,
ASIC and MCU must be active during the loading.
CTRLU – PWRU
MCU controls the watchdog timer in PSL+. It sends a positive pulse
at approximately 2 Hz to XPWROFF pin of the PSL+ to keep the
power on. If MCU fails to deliver this pulse, the PSL+ will remove
power from the system. MCU also controls the charger on/off switch-
ing in the PWRU block. When power off is requested or MCU leaves
PSL+ watchdog without reset. After the watchdog time has elapsed
PSL+ cuts off the supply voltages from the phone.
CTRLU – ASIC
MCU and ASIC have a common 8–bit data bus and a 9–bit address
bus. Bits A(4:0) are used for normal addressing whereas bits
A(19:16) are decoded in ASIC to chip select inputs for CTRLU me-
mories. ASIC controls the main clock, main reset and interrupts to
MCU. The internal clock of MCU is half the MCUCLK clock speed.
RESETX resets everything in MCU except the contents of the RAM.
IRQX is a general purpose interrupt request line from ASIC. After
IRQX request the interrupt register of the ASIC is read to find out the
reason for interrupt. NMI interrupt is used only to wake up MCU from
software standby mode.