User Guide

PAMS
System Module DB6
NHB–3
Technical Documentation
Original 26/97
Page 4–13
Functional Description
Clocking Scheme Diagram
ASIC
MCU
RFI
ear
mouth
VCTCXO
RF System Clock
26 MHz
MCU
Clock
26 MHz
RFI Clock 13 MHz
Sleep Mode:
135.4kHz
OSCIL–
LATOR
DSP Clock
60.2 MHz
differential sine
wave
Codec Main Clock
and data Transfer
clock
512kHz
Codec Sync Clock
8 kHz
enable
AUDIO
CODEC
DSP
DBUSCLK 512kHz
DBUSSYNC 8kHz
3.25 / 1.625
MHz
DBUSCLK 512kHz
DBUSSYNC 8kHz
UIMCLK
Circuit Description
Most of the clocks are generated from the 26 MHz VCTCXO frequency by the
ASIC:
– 26 MHz clock for the MCU. MCU‘s internal clock frequency is half
of that (13 MHz).
– 13 MHz for the RFI. The ASIC also generates 135.4 kHz sleep
mode clock for the RFI.
– 3.25 MHz clock for UIM. When there is no data transfer between
the UIM card and the HP the clock can be reduced to 1.625 MHz.
Some UIM cards also allows the clock to be stopped in that mode.
– 512 kHz main clock for the codec and for the data transfer be-
tween the DSP and the codec.