User Guide

Technical Documentation
NHD–4
System Module
P.A.M.S
Page 4–14
Original 11/97
Baseband Functional Description
Below is a list of the functional blocks of the baseband architecture:
– Power Supply
– Microcomputer Unit (MCU)
External Memory –
Electrically Eraseable Programmable Read Only
Memory (EEPROM)
Static Random Access Memory (SRAM)
Flash Memory
MBUS
– Digital Signal Processor (DSP)
External Memory –Static Random Access Memory (SRAM)
DBUS
Multipath Analyzyer
– Audio Coder/Decoder (CODEC)
– CDSB ASIC
Sleep Clock Oscillator (32 KHz)
– CDMA RF to BB Interface (CDRFI)
– RF Interface
Power Supply
The PSL+3 – IC produces the supply voltages:
3 * VL 150 mA for logic
VA1 40 mA not used at this time
VA2 80 mA for AUDIO
VREF 5 mA reference
It also has internal watchdog, voltage detection and charger detection
functions. The watchdog will cut the output voltages if it is not resetted
once in about 6 seconds. The voltage detector resets the phone if the
battery voltage falls below 4.0 V. The charger detection starts the phone if
it is in power–off when the charging voltage is applied.
The charging electronics is controlled by the MCU. When the charging
voltage is applied to the phone while the phone is powered up, the MCU
detects it and starts controlling the charging.
If the phone is in power–off, the PSL+3 will detect the charging voltage
and start the phone. If the battery voltage is high enough the reset will be
released and the MCU will start controlling the charging. If the battery
voltage is too low the phone is in reset and charging control circuitry will
pass the charging current to the battery. When the battery voltage has
reached 4 V the reset will be removed and the MCU starts controlling the
charging. This all is invisible to the user.