User Guide

Nokia Customer Care Baseband Description and Troubleshooting

2118 (RH-77)

Power Up and Reset

Power up and reset are controlled by the UEMC ASIC. The baseband can be powered up in

the following ways:

• Pressing the Power button, which means grounding the PWRONX pin of the

UEMC

• Connecting the charger to the charger input

• Initiating the RTC Alarm, when the RTC logic has been programmed to give an

alarm

After receiving one of the above signals, the UEMC counts a 20 ms delay and then enters

reset mode. The watchdog starts, and if the battery voltage is greater than Vcoff+, a

200 ms delay is started to allow references (etc.) to settle. After this delay elapses, the

VFLASH1 regulator is enabled. Then, 500 us later, the VR3, VANA, VIO, and VCORE are

enabled. Finally, the Power Up Reset (PURX) line is held low for 20 ms. This reset (PURX)

is sent to the UPP. Resets are generated for the MCU and the DSP. During this reset

phase, the UEMC forces the VCTCXO regulator on — regardless of the status of the sleep

control input signal to the UEMC. The FLSRSTx from the UPP is used to reset the flash

during power up and to put the flash in power down during sleep. All baseband

regulators are switched on when the UEMC is powered on. The UEMC internal watchdogs

are running during the UEMC reset state, with the longest watchdog time selected. If the

watchdog expires, the UEMC returns to the power off state. The UEMC watchdogs are

internally acknowledged at the rising edge of the PURX signal to always give the same

watchdog response time to the MCU.

The following timing diagram represents the UEMC start-up sequence from reset to

power-on mode.