Product Description

Product Description
56 (98) © Nokia Corporation Draft DN991444
Nokia Proprietary and Confidential Issue 3-0 en Draft
The EMUCA ASIC (Application Specific Integrated Circuit) is a UC interface
ASIC. It also handles clock generation and synchronisation, interrupt and alarm
handling functions.
The EQDSP is functionally connected to the ERECVA ASIC. This block handles
sample receiving from RF, channel equalisation and bit detection functions for
both GMSK and 8-PSK.
The interface from the BB to the RF modules is via a serial bus with HDLC
protocol, and contains downlink (DL) data and initialisation messages to the RF
module. The RF to BB HDLC frame includes I (In Phase) and Q (Quadrature)
components of the received signal, and also consists of alarms, timing and status
information from the RF module.
The CHDSP is functionally connected to the EFBIA ASIC. This block handles
burst transmitting to RF (DL_DATA), channel decoding and encoding, and
ciphering and deciphering functions. EFBIA interfaces to the F-bus provide
frequency hopping functions.
The BB contains FLASH and RAM memories. FLASH memory is used for the
BTS SW and SW backup. There are separate RAM memories for the UC and
CHDSP to store programs and data.
6.3.2 RF module
The RF module has four parts, the TX, RX, RF Loop, and digital interface.
The parts of the RF module are shown in Figure 20.