Service Manual

GSM-205-323
NIU
31st Oct 01
Tech. 6–18
Technical Description: Horizon macro indoor
CONTROLLED INTRODUCTION
68P02902W07-B
Control
processor
The control processor interfaces to timeslot 0 of link 0 from each connected
MCUF.
The processor uses 512 kbytes of flash EPROM for boot code. operational code
storage and module ID. Code is executed directly from the Flash EPROM. The
boot code can be overwritten under control of the MCUF, if required.
The processor also has an on-chip 1 Mbyte of DRAM.
TTY ports
The processing section provides two TTY ports for Motorola debugging
purposes only.
Resets
The processor is capable of soft resetting itself. The front panel reset causes a
hard reset of the entire board. Power-on also resets the processor.
The MCUF is able to reset the NIU via a message on the HDLC link.
NIU/MCUF
framing and
clocks
The control processor is supplied with a clock from an on-board crystal
oscillator, which has an output enable pad for test purposes. The framer
devices also have their own crystal oscillators on-board.
The framer devices provide the decoded and jitter attenuated receive data, for
passing to the MCUF.
The framer devices also extract a clock signal from an E1/T1 link, which is then
passed to the MCUF synchronization circuit. At the MCUF, this signal is used to
phase lock a local 16.384 MHz clock signal. Once phase locked, three reference
clock signals are provided for NIU use:
 REF 2.048 MHz clock signal.
 REF 6.12 s clock signal.
 REF 125 s clock signal.
The NIU transmit and receive framing is controlled by this 125 s reference
pulse received from the MCUF.