User's Manual

Preparing the LMF – continued
May 2000
3-15
SC 4812T CDMA BTS Optimization/ATP
Pinging the Processors
For proper operation, the integrity of the Ethernet LAN A and B links
must be be verified. Figure 3-5 represents a typical BTS Ethernet
configuration. The drawing depicts one (of two identical) links, A and B.
Ping is a program that routes request packets to the LAN network
modules to obtain a response from the specified “targeted” BTS.
CHASSIS
GROUND
SIGNAL
GROUND
50Ω
SIGNAL
GROUND
50Ω
IN
LMF CONNECTOR
B
C–CCP
CAGE
AB
IN
A
B
A
OUT
OUT
BTS
(expansion)
B
C–CCP
CAGE
AB
IN
A
B
A
OUT
BTS
(master)
SIGNAL
GROUND
50Ω
IN
OUT
Figure 3-5: BTS LAN Interconnect Diagram
FW00141
CHASSIS
GROUND
SIGNAL
GROUND
Follow the procedure in Table 3-8 and refer to Figure 3-6 or Figure 3-7,
as required, to ping each processor (on both LAN A and LAN B) and
verify LAN redundancy is operating correctly.
Always wear a conductive, high impedance wrist strap
while handling any circuit card/module to prevent damage
by ESD.
CAUTION
*
The Ethernet LAN A and B cables must be installed on
each frame/enclosure before performing this test. All other
processor board LAN connections are made via the
backplanes.
IMPORTANT
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