Data Sheet
1. Product profile
1.1 General description
Intermediate level N-channel and P-channel complementary pair enhancement mode
Field-Effect Transistor (FET) in a plastic package using vertical D-MOS technology. This
product is designed and qualified for use in computing, communications, consumer and
industrial applications only.
1.2 Features and benefits
Low conduction losses due to low
on-state resistance
Suitable for high frequency
applications due to fast switching
characteristics
1.3 Applications
Motor and actuator drivers
Power management
Synchronized rectification
1.4 Quick reference data
PHC21025
Complementary intermediate level FET
Rev. 04 — 17 March 2011 Product data sheet
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
V
DS
drain-source voltage T
j
≥ 25 °C; T
j
≤ 150 °C;
N-channel
--30V
T
j
≥ 25 °C; T
j
≤ 150 °C;
P-channel
---30V
I
D
drain current T
sp
≤ 80 °C; P-channel - - -2.3 A
T
sp
≤ 80 °C; N-channel - - 3.5 A
P
tot
total power dissipation T
amb
=25°C
[1]
--1W
Static characteristics
R
DSon
drain-source on-state
resistance
V
GS
=-10V; I
D
=-1A;
T
j
= 25 °C; P-channel;
see Figure 16
; see Figure 19
- 0.22 0.25 Ω
V
GS
=10V; I
D
=2.2A;
T
j
= 25 °C; N-channel;
see Figure 15; see Figure 18
- 0.08 0.1 Ω










