Data Sheet

Nexperia
74HC595-Q100; 74HCT595-Q100
8-bit serial-in, serial or parallel-out shift register with output latches; 3-state
74HC_HCT595_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 3 — 28 February 2017
13 / 23
mna560
GND
GND
t
h
t
su
t
h
t
su
V
M
V
M
V
M
V
I
V
OH
V
OL
V
I
Q7S output
SHCP input
DS input
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable output performance.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Figure 11. Data set-up and hold times
mna561
MR input
SHCP input
Q7S output
t
PHL
t
W
t
rec
V
M
V
OH
V
OL
V
I
GND
V
I
GND
V
M
V
M
Measurement points are given in Table 8.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Figure 12. Master reset to output propagation delays