Data Sheet

ManualsBrandsNEXPERIA ManualsLogic ICsLogic IC - Buffer, driver SSOP 16

1. General description

The 74HC4050 is a hex buffer with over-voltage tolerant inputs. Inputs are overvoltage

tolerant to 15 V which enables the device to be used in HIGH-to-LOW level shifting

applications.

2. Features and benefits

 Low-power dissipation

 Complies with JEDEC standard no. 7A

 ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V

 Multiple package options

 Specified from 40 Cto+85C and from 40 Cto+125C

3. Ordering information

74HC4050

Hex non-inverting HIGH-to-LOW level shifter

Rev. 4 — 5 February 2016 Product data sheet

Table 1. Ordering information

Type number Package

Temperature range Name Description Version

74HC4050D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width

3.9 mm

SOT109-1

74HC4050DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads;

body width 5.3 mm

SOT338-1

74HC4050PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads;

body width 4.4 mm

SOT403-1

Summary of content (14 pages)

PAGE 1
74HC4050 Hex non-inverting HIGH-to-LOW level shifter Rev. 4 — 5 February 2016 Product data sheet 1. General description The 74HC4050 is a hex buffer with over-voltage tolerant inputs. Inputs are overvoltage tolerant to 15 V which enables the device to be used in HIGH-to-LOW level shifting applications. 2. Features and benefits  Low-power dissipation  Complies with JEDEC standard no.
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74HC4050 Nexperia Hex non-inverting HIGH-to-LOW level shifter 4. Functional diagram $ < $ < $ < $ < $ < $ < 9 9 9 9 9 9 9 9 DDH Fig 1. 9 9 9 9 < $ DDD Logic symbol Fig 2. DDD IEC logic symbol Fig 3. Logic diagram (one level shifter) 5. Pinning information 5.
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74HC4050 Nexperia Hex non-inverting HIGH-to-LOW level shifter 5.2 Pin description Table 2. Pin description Symbol Pin Description VCC 1 supply voltage 1Y to 6Y 2, 4, 6, 10, 12, 15 output 1A to 6A 3, 5, 7, 9, 11, 14 input GND 8 ground (0 V) n.c. 13, 16 not connected 6. Functional description Table 3. Function table [1] Input Output nA nY L L H H [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 7. Limiting values Table 4.
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74HC4050 Nexperia Hex non-inverting HIGH-to-LOW level shifter ȍ LQSXW WR ORJLF FLUFXLW SRO\VLOLFRQ UHVLVWRU ' *1' DDQ Fig 6. Input protection for the 74HC4050 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions VCC supply voltage VI input voltage VO output voltage Tamb ambient temperature t/V input transition rise and fall rate Min Typ Max Unit 2.0 5.0 6.
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74HC4050 Nexperia Hex non-inverting HIGH-to-LOW level shifter Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions VOL VI = VIH or VIL Tamb = 25 C Min II LOW-level output voltage input leakage current ICC supply current CI input capacitance Tamb = 40 C to +85 C Tamb = 40 C to Unit +125 C Typ Max Min Max Min Max IO = 20 A; VCC = 2.0 V - - 0.1 - 0.1 - 0.
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74HC4050 Nexperia Hex non-inverting HIGH-to-LOW level shifter Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 8. Tamb = 25 C Symbol Parameter Conditions CPD CL = 50 pF; f = 1 MHz; VI = GND to VCC [1] power dissipation capacitance Tamb = 40 C to +85 C Tamb = 40 C to +125 C Min Typ Max Min Max Min Max - 14 - - - - - [3] Unit pF tpd is the same as tPLH and tPHL.
PAGE 7
4HC4050 Nexperia Hex non-inverting HIGH-to-LOW level shifter 9, QHJDWLYH SXOVH W: 90 *1' 9, WI WU WU WI SRVLWLYH SXOVH *1' 90 90 90 W: 9&& * 9, 92 '87 57 &/ DDK Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig 8.
PAGE 8
74HC4050 Nexperia Hex non-inverting HIGH-to-LOW level shifter 12.
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PAGE 10
74HC4050 Nexperia Hex non-inverting HIGH-to-LOW level shifter 76623 SODVWLF WKLQ VKULQN VPDOO RXWOLQH SDFNDJH OHDGV ERG\ ZLGWK PP ' 627 ( $ ; F \ + ( Y 0 $ = 4 $ SLQ LQGH[ $ $ $ ș / S / H GHWDLO ; Z 0 E S PP VFDOH ',0(16,216 PP DUH WKH RULJLQDO GLPHQVLRQV 81,7 $ PD[ $ $ $ E S F ' ( H + ( / / S 4 Y Z \ = ș PP
PAGE 11
74HC4050 Nexperia Hex non-inverting HIGH-to-LOW level shifter 13. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC4050 v.4 20160205 Product data sheet - 74HC4050 v.3 Modifications: 74HC4050 v.
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74HC4050 Nexperia Hex non-inverting HIGH-to-LOW level shifter 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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74HC4050 Nexperia Hex non-inverting HIGH-to-LOW level shifter Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use.
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Nexperia 74HC4050 Hex non-inverting HIGH-to-LOW level shifter 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 © General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . .