Data Sheet
Table Of Contents
- 1 Design guidelines
- 2 Ordering Information
- 3 Pinout and Terminal Descriptions
- 4 Packaging
- 5 Power control
- 6 Interfaces
- 7 Block diagram
- 8 Example schematics
- 9 802.11 Radio
- 10 Firmware
- 11 Host interfaces
- 12 Electrical characteristics
- 13 RF Characteristics
- 14 Physical dimensions
- 15 Layout guidelines
- 16 Soldering recommendations
- 17 Certifications
- 18 Qualified Antenna Types for WF121-E
Silicon Labs
Page 29 of 45
12.3 Input/output terminal characteristics
12.4 Digital
Digital terminals Min Typ Max Unit
Input voltage levels
V
IL
input logic level low 1.7V ≤ VDD ≤ 3.6V VSS-0.3V - 0.15VDD V
V
IH
input logic level high 1.7V ≤ VDD ≤ 3.6V 0.8VDD - VDD+0.3V V
Output voltage levels
V
OL
output logic level low, Vdd = 3.6 V, Iol = 7 mA - - 0.4 V
V
OH
output logic level high Vdd = 3.6 V, Ioh = -12 mA 2.4 - VDD V
Table 14: Digital terminal electrical characteristics
Min Typ max
Frequency 32.748 32.768 32.788 kHz
Deviation @25
o
C -20 +20 ppm
Deviation over temperature -150 +150 ppm
Duty cycle 30 50 70 %
Rise time 50 ns
Input high level 0.625Vdd Vdd+0.3 V
Input low level -0.3 0.25Vdd V
Table 15: External Wi-Fi sleep clock specifications
12.5 Reset
Power-on Reset Min Typ Max Unit
Power on reset threshold 1.75 - 2.1 V
VDD rise rate to ensure reset 0.05 - 115 V/ms
Table 16: Power on reset characteristics