Data Sheet
Table Of Contents
- 1 Design guidelines
- 2 Ordering Information
- 3 Pinout and Terminal Descriptions
- 4 Packaging
- 5 Power control
- 6 Interfaces
- 7 Block diagram
- 8 Example schematics
- 9 802.11 Radio
- 10 Firmware
- 11 Host interfaces
- 12 Electrical characteristics
- 13 RF Characteristics
- 14 Physical dimensions
- 15 Layout guidelines
- 16 Soldering recommendations
- 17 Certifications
- 18 Qualified Antenna Types for WF121-E
Silicon Labs
Page 27 of 45
11 Host interfaces
11.1 UART
The module can be controlled over the UART interface. In order for the communication to be reliable,
hardware flow control signals (RTS and CTS) must be present between the host and the module. When using
high UART transfer speeds (between 1 and 20Mbps), an external crystal is required on OSC1/OSC2 for
sufficient clock accuracy.
When using WF121 UART in transparent mode, we highly recommend using RTS/CTS flow control to avoid
the possibility of losing data.
11.2 USB
When using the USB host interface, the module will appear as a USB CDC/ACM device enumerating as
virtual COM port. The same protocol can be used as with the UART interface.
11.3 SPI
Please refer to the Bluegiga WF121 API reference documentation supplied with the firmware regarding using
SPI as the host interface. As SPI does not allow the slave device to signal to the master over the bus unless
polled, BGAPI over SPI requires the use of an additional “notify” pin which allows the module to notify the host
that an outgoing response or event packet is available.
Note: The SPI protocol does not have flow control signaling like UART does, and it is therefore impossible
under some circumstances (such as sending very large quantities of data to the module during poor network
conditions) to avoid potential data loss due to limited buffer space. If available, the UART interface with
hardware RTS/CTS handshaking is recommended for the simplest reliable host control implementation.