Mos Integrated Circuit Data Sheet

µ PD75P3116
26
Data Sheet U11369EJ3V0DS
Instruction Mnemonic Operand No. of Machine Operation Addressing Skip
Group Bytes Cycle Area Condition
Subroutine CALLA
Note
!addr1 3 3 (SP–6)(SP–3)(SP–4) ← PC11-0 *11
stack control (SP–5) ← 0, 0, PC13, 12
(SP–2) ← X, X, MBE, RBE
PC13-0 ← addr1, SP ← SP–6
CALL
Note
!addr 3 3 (SP–4)(SP–1)(SP–2) ← PC11-0 *6
(SP–3) ← MBE, RBE, PC13, 12
PC13-0 ← addr, SP ← SP–4
4 (SP–6)(SP–3)(SP–4) ← PC11-0
(SP–5) ← 0, 0, PC13, 12
(SP–2) ← X, X, MBE, RBE
PC13-0 ← addr, SP ← SP–6
CALLF
Note
!faddr 2 2 (SP–4)(SP–1)(SP–2) ← PC11-0 *9
(SP–3) ← MBE, RBE, PC13, 12
PC13-0 ← 000+faddr, SP ← SP–4
3 (SP–6)(SP–3)(SP–4) ← PC11-0
(SP–5) ← 0, 0, PC13, 12
(SP–2) ← X, X, MBE, RBE
PC13-0 ← 000+faddr, SP ← SP–6
RET
Note
1 3 MBE, RBE, PC13, 12 ← (SP+1)
PC11-0 ← (SP)(SP+3)(SP+2)
SP ← SP+4
X, X, MBE, RBE ← (SP+4)
PC11-0 ← (SP)(SP+3)(SP+2)
0, 0, PC13, 12 ← (SP+1)
SP ← SP+6
RETS
Note
1 3+S MBE, RBE, PC13, 12 ← (SP+1) Unconditional
PC11-0 ← (SP)(SP+3)(SP+2)
SP ← SP+4
then skip unconditionally
X, X, MBE, RBE ← (SP+4)
PC11-0 ← (SP)(SP+3)(SP+2)
0, 0, PC13, 12 ← (SP+1)
SP ← SP+6
then skip unconditionally
RETI
Note
1 3 MBE, RBE, PC13, 12 ← (SP+1)
PC11-0 ← (SP)(SP+3)(SP+2)
PSW ← (SP+4)(SP+5)
SP ← SP+6
0, 0, PC13, 12 ← (SP+1)
PC11-0 ← (SP)(SP+3)(SP+2)
PSW ← (SP+4)(SP+5), SP ← SP+6
Note The sections in double boxes are only supported in the Mk II mode. The other sections are only supported in the Mk I mode.