Electronics America Computer Hardware User Manual

200
µ PD78214 Sub-Series
Fig. 7-112 Setting of Control Registers for PPG Output Operation
(a) Timer control register 1 (TMC1)
(b) Prescaler mode register 1 (PRM1)
(c) Capture/compare control register 2 (CRC2)
7654321
0
1
CRC2
011 1000
Clears when TM2 coincides with CR21
Disables clearing when TM2 is captured
by CR22 register
TO2 is used for PPG output
(d) Timer output control register (TOC)
(e) Port 3 mode control register (PMC3)
7654321
0
PRS23
×
PRM1
Specifies count clock
(x/f
CLK; where x = 16, 32, 64, 128, 256 or 512)
PRS22 PRS21 PRS20
××
×
7654321
0
100
0
×
0
0
TMC1
×
Normal mode
Overflow flag
Enables counting for TM2
7654321
0
1
TOC
0
××××
TO2 for high-active PWM signal output
Enables PPG output for TO2
××
7654321
0
1
PMC3
××××××
×
Specifies P36 pin as TO2 output