Single-Chip Microcontrollers User's Manual

CHAPTER 8 STANDBY FUNCTION
216 User’s Manual U10676EJ3V0UM
8.1 Settings and Operating Statuses of Standby Mode
Table 8-1. Operating Statuses in Standby Mode
STOP Mode HALT Mode
Instruction to be set STOP instruction HALT instruction
Operating status Clock generator Operation stopped Only CPU clock Φ is stopped
(oscillation continues)
Basic interval timer/ Operation stopped Operation possible
watchdog timer BT mode: Sets IRQBT at reference
time intervals
WT mode: Generates reset signal
when BT overflows
Timer counter Operation stopped Operation possible
External interrupt INT0 cannot operate
Note
INT2 can only operate at KRn fall.
CPU Operation stopped
Release signal • Reset signal • Reset signal
• Interrupt request signal from hardware • Interrupt request signal from hardware
in which interrupt is enabled in which interrupt is enabled
• System reset signal (key return reset)
generated by KRn fall when KRREN
pin is 1
Note Operation is possible only when the noise eliminator is not selected (when IM02 = 1) by bit 2 of the edge
detection mode register (IM0).