Single-Chip Microcontrollers User's Manual
CHAPTER 3 FEATURES OF ARCHITECTURE AND MEMORY MAP
56 User’s Manual U10676EJ3V0UM
Figure 3-7.
µ
PD754244 I/O Map (5/8)
Hardware name (symbol)
Number of bits that
Bit
Address R/W
can be manipulated
manipulation Remarks
b3 b2 b1 b0 1-bit 4-bit 8-bit
addressing
FC0H Bit sequential buffer 0 (BSB0) R/W
mem.bit
FC1H Bit sequential buffer 1 (BSB1) R/W
pmem.@L
FC2H Bit sequential buffer 2 (BSB2) R/W
FC3H Bit sequential buffer 3 (BSB3) R/W
FC4H Unmounted
FC5H
FC6H
Reset detection flag register (RDF)
R/W
– mem.bit
Manipulation can be performed only on bits 2 and 3.
KRF WDF ––
FC7H Unmounted
to
FCDH
FCEH R/W
– mem.bit A write to an unmounted area is invalid, and
EEPROM write control register (EWC) the read value is undefined.
FCFH
–
Notes 1. In bit manipulation: EWE = R/W, EWST = R only, ERE = R/W.
2. These are not registered as reserved words.
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EWE
Note 1
EWST
Note 1
––
ERE
Note 1
EWTC6
Note 2
EWTC5
Note 2
EWTC4
Note 2










