Electronics America 4-Bit Single-Chip Microcomputer User's Manual

87
CHAPTER 5 PERIPHERAL HARDWARE FUNCTIONS
Figure 5-12. Format of the Processor Clock Control Register
Address
FB3H
3210
PCC3 PCC2 PCC1 PCC0
Symbol
PCC
CPU clock selection bit
(Operation with f
X = 6.0 MHz)
( ) is actual frequency at f
X = 6.0 MHz
CPU clock frequency
Φ = f
X /64 (93.7 kHz)
1 machine cycle 1 machine cycle
SCC3, SCC0 = 00
( ) is actual frequency at f XT = 32.768 kHz
SCC3, SCC0 = 01 or 11
CPU clock frequency
Φ = f
XT /4 (8.192 kHz)
Φ = f
X /16 (375 kHz) 2.67 µs
Φ = f
X /8 (750 kHz)
Φ = f
X /4 (1.5 MHz)
1.33 µs
0.67 µs
122 µs
00
10
01
11
(Operation with f X = 4.19 MHz)
( ) is actual frequency at f X = 4.19 MHz
CPU clock frequency
Φ = f
X /64 (65.5 kHz)
1 machine cycle 1 machine cycle
SCC3, SCC0 = 00
( ) is actual frequency at f XT = 32.768 kHz
SCC3, SCC0 = 01 or 11
CPU clock frequency
Φ = f
XT /4 (8.192 kHz)
Φ = f
X /16 (262 kHz)
Φ = f
X /8 (524 kHz)
Φ = f
X /4 (1.05 MHz)
1.91 µs
15.3 µs
122 µs
00
10
01
11
Normal operation mode
HALT mode
STOP mode
Not to be set
00
10
01
11
CPU operation mode control bits
10.7 µs
3.81 µs
0.95 µs
Remarks 1. f X : Output frequency from the main system clock oscillator
2. f
XT : Output frequency from the subsystem clock oscillator
