Electronics America Network Cables User Manual

APPENDIX A MIPS III INSTRUCTION SET DETAILS
438
Preliminary User’s Manual S15543EJ1V0UM
ADDIU
Add Immediate Unsi
g
ned
ADDIU
rs
ADDIU
0 0 1 0 0 1
rt immediate
31 26 25 21 20 16 15 0
655 16
Format:
ADDIU rt, rs, immediate
Description:
The 16-bit immediate is sign-extended and added to the contents of general register rs to form the result. The
result is placed into general register rt. No integer overflow exception occurs under any circumstances. In 64-bit
mode, the operand must be valid sign-extended, 32-bit values.
The only difference between this instruction and the ADDI instruction is that ADDIU never causes an integer
overflow exception.
Operation:
32 T: GPR
[
rt
]
←
GPR
[
rs
]
+
(
immediate
15
)
16
|| immediate
15...0
64 T: temp
←
GPR
[
rs
]
+
(
immediate
15
)
48
|| immediate
15...0
GPR
[
rt
]
←
(
temp
31
)
32
|| temp
31...0
Exceptions:
None