Electronics America Network Cables User Manual

CHAPTER 7 PCI CONTROLLER
384
Preliminary User’s Manual S15543EJ1V0UM
7.3.4 Power state transition
7.3.4.1 Transition by issue from PCI-Host
An example of the transition sequence is as follows:
1. When PCI-Host wants to change the power state of the chip, it writes the state code to Power State field in
PMCSR register.
2. The PCI Controller resets PMRDY bit in P_PPCR register to a ‘0’.
3. The PCI Controller sets PMRQX bit (PMRQ0, PMRQ1, and PMRQ3) in P_PPCR register, and issues an
interrupt to the V
R
4120A (if not masked).
4. The VR
4120A clears the interrupt by reading PGSR register and knows the transition of power state is issued.
5. Then, the V
R
4120A knows which power state is issued by reading P_PPCR register.
6. The V
R
4120A executes the operations for the system that the chip is used in, if needed.
7. When the VR
4120A is ready for the transition, the V
R
4120A writes a ‘1’ to PMRDY bit in P_PPCR register.
8. An external PCI-Host device is able to know that the chip is ready by reading PMRDY bit. The PCI-Host
device does not need to wait the completion of the preparation of the chip. Therefore, power and clock may
be removed suddenly.
Figure 7-10. The Sequence of the Transition by Issues from PCI-Host
request the transition of
the power state to PCI
Controller by writing to
PowerState field in
PM CSR register
reset PMRDY bit to '0'
in PPCR register
set PMRQX bit to '1'
in PPCR register
report to the internal
controller by
Interrupt
read PGSR register
and clear Interrupt
operation for the
transition of the
power state
write '1' to PM RDY bit
in PPCR register
set '1' to PM RDY bit
in PPCR register
change the PCI-bus
power state
write
Interrupt
write
check
PMRDY
bit or not
depends
on PCI-
Host
(optional)
PCI-Host
PCI
Controller
Internal
Controller