Network Card User Manual
Table Of Contents
- SCXI-1121 User Manual
- Support
- Important Information
- Contents
- About This Manual
- Chapter 1 Introduction
- Chapter 2 Configuration and Installation
- Chapter 3 Theory of Operation
- Chapter 4 Register Descriptions
- Chapter 5 Programming
- Appendix A Specifications
- Appendix B Rear Signal Connector
- Appendix C SCXIbus Connector
- Appendix D SCXI-1121 Front Connector
- Appendix E SCXI-1121 Cabling
- Appendix F Revision A and B Photo and Parts Locator Diagrams
- Appendix G Technical Support Resources
- Glossary
- Index
- Figures
- Figure 2-1. SCXI-1121 General Parts Locator Diagram
- Figure 2-2. SCXI-1121 Detailed Parts Locator Diagram
- Figure 2-3. SCXI-1121 Front Connector Pin Assignment
- Figure 2-4. Ground-Referenced Signal Connection with High Common-Mode Voltage
- Figure 2-5. Floating Signal Connection Referenced to Chassis Ground for Better Signal-to-Noise Ratio
- Figure 2-6. Floating AC-Coupled Signal Connection
- Figure 2-7. AC-Coupled Signal Connection with High Common-Mode Voltage
- Figure 2-8. Assembling and Mounting the SCXI-1330 Connector-and-Shell Assembly
- Figure 2-9. Nulling Circuit
- Figure 2-10. Shunt Circuit
- Figure 2-11. SCXI-1320 Parts Locator Diagram
- Figure 2-12. SCXI-1328 Parts Locator Diagram
- Figure 2-13. SCXI-1321 Parts Locator Diagram
- Figure 2-14. SCXI-1121 Rear Signal Connector Pin Assignment
- Figure 2-15. SCANCLK Timing Requirements
- Figure 2-16. Slot-Select Timing Diagram
- Figure 2-17. Serial Data Timing Diagram
- Figure 2-18. Configuration Register Write Timing Diagram
- Figure 2-19. SCXI-1121 Module ID Register Timing Diagram
- Figure 3-1. SCXI-1121 Block Diagram
- Figure 3-2. SCXIbus Connector Pin Assignment
- Figure 3-3. Digital Interface Circuitry Block Diagram
- Figure 3-4. SCXI-1121 Digital Control
- Figure 3-5. Analog Input Block Diagram
- Figure 3-6. Analog Output Circuitry
- Figure 3-7. Single-Module Parallel Scanning
- Figure 3-8. Single-Module Multiplexed Scanning (Direct)
- Figure 3-9. Single-Module Multiplexed Scanning (Indirect)
- Figure 3-10. Multiple-Module Multiplexed Scanning
- Figure 3-11. Multiple-Chassis Scanning
- Figure B-1. SCXI-1121 Rear Signal Connector Pin Assignment
- Figure C-1. SCXIbus Connector Pin Assignment
- Figure D-1. SCXI-1121 Front Connector Pin Assignment
- Figure E-1. SCXI-1340 Installation
- Figure E-2. SCXI-1180 Rear Connections
- Figure E-3. SCXI-1180 Front Panel Installation
- Figure E-4. Cover Removal
- Figure F-1. Revision A and B SCXI-1121 Signal Conditioning Module
- Figure F-2. Revision A and B SCXI-1121 General Parts Locator Diagram
- Figure F-3. Revision A and B SCXI-1121 Detailed Parts Locator Diagram
- Tables
- Table 2-1. Digital Signal Connections, Jumper Settings
- Table 2-2. Jumper W33 Settings
- Table 2-3. Gain Jumper Allocation
- Table 2-4. Gain Jumper Positions
- Table 2-5. Filter Jumper Allocation
- Table 2-6. Voltage and Current Mode Excitation Jumper Setup
- Table 2-7. Maximum Load per Excitation Channel
- Table 2-8. Excitation Level Jumper Selection
- Table 2-9. Completion Network Jumpers
- Table 2-10. Trimmer Potentiometer and Corresponding Channel
- Table 2-11. Nulling Resistors and Corresponding Channel
- Table 2-12. Jumper Settings of the Nulling Circuits
- Table 2-13. Jumper Settings on the SCXI-1320 Terminal Block
- Table 2-14. Jumper Settings on the SCXI-1328 Terminal Block
- Table 2-15. Jumper Settings on the SCXI-1321 Terminal Block
- Table 2-16. SCXIbus to SCXI-1121 Rear Signal Connector to Data Acquisition Board Pin Equivalences
- Table 3-1. SCXIbus Equivalents for the Rear Signal Connector
- Table 3-2. Calibration Potentiometer Reference Designators
- Table 5-1. SCXI-1121 Rear Signal Connector Pin Equivalences
- Table E-1. SCXI-1121 and MIO-16 Pinout Equivalences
- Table E-2. SCXI-1341 and SCXI-1344 Pin Translations
- Table E-3. SCXI-1342 Pin Translations
- Table E-4. SCXI-1343 Pin Connections
Index
© National Instruments Corporation Index-7 SCXI-1121 User Manual
SCXI-1344 Lab-PC+ cable assembly, E-5
problem-solving and diagnostic resources,
online, G-1
programming, 5-1 to 5-17
notation, 5-1
register writes, 5-2 to 5-4
initialization, 5-4
register selection and write
procedure, 5-2 to 5-3
SCXI-1121 rear signal connector
equivalences (table), 5-2
scanning measurements, 5-7 to 5-15
acquisition enable, triggering, and
servicing, 5-14 to 5-15
Counter 1 and SCANDIV,
5-9to5-10
data acquisition board setup,
5-7to5-9
examples, 5-15 to 5-17
module programming, 5-10 to 5-13
multiple-chassis scanning,
5-12 to 5-13
multiple-module multiplexed
scanning, 5-12
single-module multiplexed scanning
(indirect), 5-11 to 5-12
single-module parallel
scanning, 5-10
Slot 0 hardscan circuitry,
5-13 to 5-14
single-channel measurements, 5-4 to 5-6
direct measurements, 5-4 to 5-5
indirect measurements, 5-5 to 5-6
multiplexed output, 5-4 to 5-5
from other modules, 5-5
parallel output, 5-4
from SCXI-1121 via another module,
5-5, 5-6
programming languages, SCXI-1121 support
for, 1-2 to 1-3
R
RD bit, 4-7
rear signal connector, 2-37 to 2-46
analog output, 2-39
communication signals, 2-42 to 2-46
digital I/O, 2-40 to 2-41
pin assignments (figure), 2-37, B-1
SCXIbus to SCXI-1121 to DAQ board
pin equivalences (table), 2-41
signal descriptions (table), 2-38, B-2
timing requirements and communication
protocol, 2-42
reference mode selection, jumper settings for,
2-6 to 2-7
register writes, 5-2 to 5-4
Configuration Register
digital control circuitry, 3-7 to 3-8
programming, 5-2 to 5-4
slot-selection procedure, 2-44 to 2-45
initialization, 5-4
register selection and write procedure,
5-2 to 5-3
SCXI-1121 rear signal connector
equivalences (table), 5-2
registers, 4-1 to 4-9
Configuration Register
description, 4-3 to 4-5
overview, 3-7
write timing diagram, 2-45
writing to, 2-44 to 2-45, 3-7 to 3-8,
5-2 to 5-4
description format, 4-1
FIFO Register
description, 4-9
register writes, 5-2 to 5-4
Hardscan Control Register (HSCR),
4-7 to 4-8
Module ID Register
description, 4-2
overview, 3-8
reading from, 2-45 to 2-46