Network Card User Manual
Table Of Contents
- SCXI-1121 User Manual
- Support
- Important Information
- Contents
- About This Manual
- Chapter 1 Introduction
- Chapter 2 Configuration and Installation
- Chapter 3 Theory of Operation
- Chapter 4 Register Descriptions
- Chapter 5 Programming
- Appendix A Specifications
- Appendix B Rear Signal Connector
- Appendix C SCXIbus Connector
- Appendix D SCXI-1121 Front Connector
- Appendix E SCXI-1121 Cabling
- Appendix F Revision A and B Photo and Parts Locator Diagrams
- Appendix G Technical Support Resources
- Glossary
- Index
- Figures
- Figure 2-1. SCXI-1121 General Parts Locator Diagram
- Figure 2-2. SCXI-1121 Detailed Parts Locator Diagram
- Figure 2-3. SCXI-1121 Front Connector Pin Assignment
- Figure 2-4. Ground-Referenced Signal Connection with High Common-Mode Voltage
- Figure 2-5. Floating Signal Connection Referenced to Chassis Ground for Better Signal-to-Noise Ratio
- Figure 2-6. Floating AC-Coupled Signal Connection
- Figure 2-7. AC-Coupled Signal Connection with High Common-Mode Voltage
- Figure 2-8. Assembling and Mounting the SCXI-1330 Connector-and-Shell Assembly
- Figure 2-9. Nulling Circuit
- Figure 2-10. Shunt Circuit
- Figure 2-11. SCXI-1320 Parts Locator Diagram
- Figure 2-12. SCXI-1328 Parts Locator Diagram
- Figure 2-13. SCXI-1321 Parts Locator Diagram
- Figure 2-14. SCXI-1121 Rear Signal Connector Pin Assignment
- Figure 2-15. SCANCLK Timing Requirements
- Figure 2-16. Slot-Select Timing Diagram
- Figure 2-17. Serial Data Timing Diagram
- Figure 2-18. Configuration Register Write Timing Diagram
- Figure 2-19. SCXI-1121 Module ID Register Timing Diagram
- Figure 3-1. SCXI-1121 Block Diagram
- Figure 3-2. SCXIbus Connector Pin Assignment
- Figure 3-3. Digital Interface Circuitry Block Diagram
- Figure 3-4. SCXI-1121 Digital Control
- Figure 3-5. Analog Input Block Diagram
- Figure 3-6. Analog Output Circuitry
- Figure 3-7. Single-Module Parallel Scanning
- Figure 3-8. Single-Module Multiplexed Scanning (Direct)
- Figure 3-9. Single-Module Multiplexed Scanning (Indirect)
- Figure 3-10. Multiple-Module Multiplexed Scanning
- Figure 3-11. Multiple-Chassis Scanning
- Figure B-1. SCXI-1121 Rear Signal Connector Pin Assignment
- Figure C-1. SCXIbus Connector Pin Assignment
- Figure D-1. SCXI-1121 Front Connector Pin Assignment
- Figure E-1. SCXI-1340 Installation
- Figure E-2. SCXI-1180 Rear Connections
- Figure E-3. SCXI-1180 Front Panel Installation
- Figure E-4. Cover Removal
- Figure F-1. Revision A and B SCXI-1121 Signal Conditioning Module
- Figure F-2. Revision A and B SCXI-1121 General Parts Locator Diagram
- Figure F-3. Revision A and B SCXI-1121 Detailed Parts Locator Diagram
- Tables
- Table 2-1. Digital Signal Connections, Jumper Settings
- Table 2-2. Jumper W33 Settings
- Table 2-3. Gain Jumper Allocation
- Table 2-4. Gain Jumper Positions
- Table 2-5. Filter Jumper Allocation
- Table 2-6. Voltage and Current Mode Excitation Jumper Setup
- Table 2-7. Maximum Load per Excitation Channel
- Table 2-8. Excitation Level Jumper Selection
- Table 2-9. Completion Network Jumpers
- Table 2-10. Trimmer Potentiometer and Corresponding Channel
- Table 2-11. Nulling Resistors and Corresponding Channel
- Table 2-12. Jumper Settings of the Nulling Circuits
- Table 2-13. Jumper Settings on the SCXI-1320 Terminal Block
- Table 2-14. Jumper Settings on the SCXI-1328 Terminal Block
- Table 2-15. Jumper Settings on the SCXI-1321 Terminal Block
- Table 2-16. SCXIbus to SCXI-1121 Rear Signal Connector to Data Acquisition Board Pin Equivalences
- Table 3-1. SCXIbus Equivalents for the Rear Signal Connector
- Table 3-2. Calibration Potentiometer Reference Designators
- Table 5-1. SCXI-1121 Rear Signal Connector Pin Equivalences
- Table E-1. SCXI-1121 and MIO-16 Pinout Equivalences
- Table E-2. SCXI-1341 and SCXI-1344 Pin Translations
- Table E-3. SCXI-1342 Pin Translations
- Table E-4. SCXI-1343 Pin Connections
Index
SCXI-1121 User Manual Index-2 www.natinst.com
C
cable assemblies. See SCXI-1121 cabling.
cables, custom, 1-5
calibration, 3-11 to 3-14
equipment requirements, 3-11 to 3-12
excitation adjust, 3-13 to 3-14
offset null adjust, 3-11
potentiometer reference designators
(table), 3-14
CGND signal (table), 2-18, D-3
CH0+ signal (table), 2-19, D-4
CH0- signal (table), 2-19, D-4
CH1+ signal (table), 2-19, D-4
CH1- signal (table), 2-19, D-4
CH2+ signal (table), 2-19, D-4
CH2- signal (table), 2-19, D-4
CH3+ signal (table), 2-18, D-3
CH3- signal (table), 2-18, D-3
CHAN<1..0> bits, 4-4
CHS<4..0> bits, 4-6
CHSGND signal (table), 3-4, C-3
CLKEN bit, 4-8
CLKOUTEN bit, 4-3
CLKSELECT bit, 4-3
CNT<6..0> bits, 4-9
cold-junction sensor specifications,
A-3 to A-4
communication signals, 2-42 to 2-47
overview, 2-42
reading from Module ID Register,
2-45 to 2-46
serial data timing diagram, 2-44
slot-select timing diagram, 2-43
timing requirements for SERCLK and
SERDATIN signals (figure), 2-44
writing 16-bit slot-select number to
Slot 0, 2-43
writing to Configuration Register,
2-44 to 2-45
completion network jumpers (table),
2-12 to 2-13
configuration
analog, 2-6 to 2-13
excitation jumpers, 2-9 to 2-13
filter jumpers, 2-9
gain jumpers, 2-8
grounding, shielding, and reference
mode selection, 2-6 to 2-7
input channel jumpers, 2-8 to 2-13
jumper W33, 2-6 to 2-7
digital signal connections
jumper settings (figure), 2-5 to 2-6
jumper W32, 2-4
jumper W38, 2-4
jumper W44, 2-3 to 2-4
using jumpers W32 and W38,
2-4to2-5
excitation jumpers, 2-9 to 2-13
current and voltage jumpers,
2-9to2-10
excitation level, 2-10 to 2-11
internal half-bridge completion,
2-12 to 2-13
fixed jumpers, 2-2
parts locator diagrams
detailed (figure), 2-2
general (figure), 2-1
terminal blocks, 2-31 to 2-32
user-configurable jumpers, 2-2 to 2-3
Configuration Register
description, 4-3 to 4-5
overview, 3-7
write timing diagram, 2-45
writing to
digital control circuitry, 3-7 to 3-8
programming, 5-2 to 5-4
slot-selection procedure, 2-44 to 2-45
connector-and-shell assembly, 2-22 to 2-24
connectors. See front connector; rear signal
connector; SCXIbus connector.
conventions used in manual, xi-xii