Network Card User Manual
Table Of Contents
- SCXI-1121 User Manual
- Support
- Important Information
- Contents
- About This Manual
- Chapter 1 Introduction
- Chapter 2 Configuration and Installation
- Chapter 3 Theory of Operation
- Chapter 4 Register Descriptions
- Chapter 5 Programming
- Appendix A Specifications
- Appendix B Rear Signal Connector
- Appendix C SCXIbus Connector
- Appendix D SCXI-1121 Front Connector
- Appendix E SCXI-1121 Cabling
- Appendix F Revision A and B Photo and Parts Locator Diagrams
- Appendix G Technical Support Resources
- Glossary
- Index
- Figures
- Figure 2-1. SCXI-1121 General Parts Locator Diagram
- Figure 2-2. SCXI-1121 Detailed Parts Locator Diagram
- Figure 2-3. SCXI-1121 Front Connector Pin Assignment
- Figure 2-4. Ground-Referenced Signal Connection with High Common-Mode Voltage
- Figure 2-5. Floating Signal Connection Referenced to Chassis Ground for Better Signal-to-Noise Ratio
- Figure 2-6. Floating AC-Coupled Signal Connection
- Figure 2-7. AC-Coupled Signal Connection with High Common-Mode Voltage
- Figure 2-8. Assembling and Mounting the SCXI-1330 Connector-and-Shell Assembly
- Figure 2-9. Nulling Circuit
- Figure 2-10. Shunt Circuit
- Figure 2-11. SCXI-1320 Parts Locator Diagram
- Figure 2-12. SCXI-1328 Parts Locator Diagram
- Figure 2-13. SCXI-1321 Parts Locator Diagram
- Figure 2-14. SCXI-1121 Rear Signal Connector Pin Assignment
- Figure 2-15. SCANCLK Timing Requirements
- Figure 2-16. Slot-Select Timing Diagram
- Figure 2-17. Serial Data Timing Diagram
- Figure 2-18. Configuration Register Write Timing Diagram
- Figure 2-19. SCXI-1121 Module ID Register Timing Diagram
- Figure 3-1. SCXI-1121 Block Diagram
- Figure 3-2. SCXIbus Connector Pin Assignment
- Figure 3-3. Digital Interface Circuitry Block Diagram
- Figure 3-4. SCXI-1121 Digital Control
- Figure 3-5. Analog Input Block Diagram
- Figure 3-6. Analog Output Circuitry
- Figure 3-7. Single-Module Parallel Scanning
- Figure 3-8. Single-Module Multiplexed Scanning (Direct)
- Figure 3-9. Single-Module Multiplexed Scanning (Indirect)
- Figure 3-10. Multiple-Module Multiplexed Scanning
- Figure 3-11. Multiple-Chassis Scanning
- Figure B-1. SCXI-1121 Rear Signal Connector Pin Assignment
- Figure C-1. SCXIbus Connector Pin Assignment
- Figure D-1. SCXI-1121 Front Connector Pin Assignment
- Figure E-1. SCXI-1340 Installation
- Figure E-2. SCXI-1180 Rear Connections
- Figure E-3. SCXI-1180 Front Panel Installation
- Figure E-4. Cover Removal
- Figure F-1. Revision A and B SCXI-1121 Signal Conditioning Module
- Figure F-2. Revision A and B SCXI-1121 General Parts Locator Diagram
- Figure F-3. Revision A and B SCXI-1121 Detailed Parts Locator Diagram
- Tables
- Table 2-1. Digital Signal Connections, Jumper Settings
- Table 2-2. Jumper W33 Settings
- Table 2-3. Gain Jumper Allocation
- Table 2-4. Gain Jumper Positions
- Table 2-5. Filter Jumper Allocation
- Table 2-6. Voltage and Current Mode Excitation Jumper Setup
- Table 2-7. Maximum Load per Excitation Channel
- Table 2-8. Excitation Level Jumper Selection
- Table 2-9. Completion Network Jumpers
- Table 2-10. Trimmer Potentiometer and Corresponding Channel
- Table 2-11. Nulling Resistors and Corresponding Channel
- Table 2-12. Jumper Settings of the Nulling Circuits
- Table 2-13. Jumper Settings on the SCXI-1320 Terminal Block
- Table 2-14. Jumper Settings on the SCXI-1328 Terminal Block
- Table 2-15. Jumper Settings on the SCXI-1321 Terminal Block
- Table 2-16. SCXIbus to SCXI-1121 Rear Signal Connector to Data Acquisition Board Pin Equivalences
- Table 3-1. SCXIbus Equivalents for the Rear Signal Connector
- Table 3-2. Calibration Potentiometer Reference Designators
- Table 5-1. SCXI-1121 Rear Signal Connector Pin Equivalences
- Table E-1. SCXI-1121 and MIO-16 Pinout Equivalences
- Table E-2. SCXI-1341 and SCXI-1344 Pin Translations
- Table E-3. SCXI-1342 Pin Translations
- Table E-4. SCXI-1343 Pin Connections
Chapter 5 Programming
SCXI-1121 User Manual 5-12 www.natinst.com
2. Program the other module not to drive Analog Bus 0, but to send
Analog Bus 0 to the data acquisition board. Also program the other
module to send a SCANCLK*-compatible signal to TRIG0.
3. Write the binary pattern
01S
c
XXXCC XX001111 to the SCXI-1121
Configuration Register, where CC is the starting channel number.
Multiple-Module Multiplexed Scanning
To scan multiple modules, you must connect one module to the data
acquisition board and the module must be able to transfer Analog Bus 0 to
the data acquisition board. This module must also be able to send a
SCANCLK*-compatible signal on TRIG0. See Chapter 2, Configuration
and Installation, for more information. The module programming steps are
as follows:
1. Perform any necessary programming to ensure that no modules are
driving Analog Bus 0. For an SCXI-1121, clearing AB0EN in the
Configuration Register will ensure that its output is not driving AB0.
2. Program the module that is connected to the data acquisition board to
connect Analog Bus 0 to the data acquisition board but not drive
Analog Bus 0 unless it is receiving an active low signal on SCANCON.
Also program the module to send a SCANCLK*-compatible signal
onto TRIG0. If this module is an SCXI-1121, this programming is
accomplished by writing the binary pattern
10S
c
XXXCC XX001111 to
its Configuration Register.
Note
If this module is an SCXI-1121 and is not going to be scanned (it is just being used
as an interface), write a zero to bit 2 (SCANCONEN) in the Configuration Register. The
start channel bits become don't care bits.
3. Program the other modules to be used in the scan to connect their
outputs to Analog Bus 0 but not to drive Analog Bus 0 unless receiving
an active low signal on SCANCON. Also program the other modules
to use TRIG0 as their clock source. For SCXI-1121 modules, this
programming is accomplished by writing the binary pattern
01S
c
XXXCC XX001111 to their Configuration Registers.
Multiple-Chassis Scanning
To scan modules on multiple chassis, you must use the SCXI-1001. The
cable from the data acquisition board must bus the digital lines to one
module on each chassis. Additionally, the cable must provide each chassis
with its own analog channel. The data acquisition board must be able to
take several readings at a time on a given channel before accessing a new