Network Device User Manual

Appendix A Specifications

NI PXIe-1065 User Manual A-8 ni.com

Maximum jitter .......................................3 ps RMS phase-jitter

(10 Hz–12 kHz range)

2 ps RMS phase-jitter

(12kHz–20MHz range)

Duty-factor for PXIe_CLK100...............45%–55%

Absolute single-ended voltage swing

(When each line in the differential pair

has 50 W termination to 1.30 V

or Thévenin equivalent)..........................400–1000 mV

Note For other specifications refer to the PXI-5 PXI Express Hardware Specification.

External 10 MHz Reference Out (BNC on rear panel of

chassis)

Accuracy.................................................±25 ppm max. (guaranteed over

the operating temperature range)

Maximum jitter .......................................5 ps RMS phase-jitter

(10Hz–1MHz range)

Output amplitude ....................................1 V

±20% square-wave

into 50 Ω

2 V

unloaded

Output impedance...................................50 Ω ±5 Ω

External Clock Source

Frequency ...............................................10 MHz ±100 PPM

Input amplitude

Rear panel BNC...............................200 mV

to 5 V

square-wave

or sine-wave

System timing slot

PXI_CLK10_IN ..............................5 V or 3.3 V TTL signal

Rear panel BNC input impedance ..........50 Ω ±5 Ω

Maximum jitter introduced

by backplane ...........................................1 ps RMS phase-jitter

(10Hz–1MHz range)