DAQ PCI-1200 User Manual Multifunctional I/O Board for PCI Bus Computers PCI-1200 User Manual July 1998 Edition Part Number 320942C-01
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Important Information Warranty The PCI-1200 is warranted against defects in materials and workmanship for a period of one year from the date of shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period. This warranty includes parts and labor.
Contents About This Manual Organization of This Manual .........................................................................................ix Conventions Used in This Manual.................................................................................x National Instruments Documentation ............................................................................xi Related Documentation..................................................................................................
Contents Types of Signal Sources ................................................................... 3-7 Floating Signal Sources...................................................... 3-7 Ground-Referenced Signal Sources ................................... 3-7 Input Configurations......................................................................... 3-7 Differential Connection Considerations (DIFF Configuration) ......................................................
Contents Analog Output Circuitry..................................................................................4-11 DAC Timing....................................................................................................4-12 Digital I/O ......................................................................................................................4-12 Chapter 5 Calibration Calibration at Higher Gains ...........................................................................................
Contents Figure 3-16. Figure 3-17. Figure 3-18. Figure 3-19. General Purpose Timing Signals .......................................................... 3-26 Mode 1 Timing Specifications for Input Transfers............................... 3-28 Mode 1 Timing Specifications for Output Transfers ............................ 3-29 Mode 2 Timing Specifications for Bidirectional Transfers .................. 3-30 Figure 4-1. Figure 4-2. Figure 4-3. Figure 4-4. Figure 4-5. Figure 4-6. PCI-1200 Block Diagram .......
About This Manual This manual describes the electrical and mechanical aspects of the PCI-1200 and contains information concerning its operation and programming. The PCI-1200 is a low-cost multifunction analog, digital, and timing board. The PCI-1200 is a member of the National Instruments PCI Series of expansion boards for PCI bus computers.
About This Manual Conventions Used in This Manual The following conventions are used in this manual: <> Angle brackets enclose the name of a key on the keyboard—for example, . Angle brackets containing numbers separated by an ellipsis represent a range of values associated with a bit or signal name—for example, DBIO<3..0>. This icon to the left of bold italicized text denotes a note, which alerts you to important information.
About This Manual National Instruments Documentation The PCI-1200 User Manual is one piece of the documentation set for your DAQ system. You could have any of several types of manuals, depending on the hardware and software in your system. Use the manuals you have as follows: • Getting Started with SCXI—If you are using SCXI, this is the first manual you should read. It gives an overview of the SCXI system and contains the most commonly needed information for the modules, chassis, and software.
About This Manual Related Documentation The following National Instruments document contains information that you may find helpful as you read this manual: • Application Note 025, Field Wiring and Noise Considerations for Analog Signals The following documents also contain information that you may find helpful as you read this manual: • “Dither in Digital Audio,” by John Vanderkooy and Stanley P. Lipshitz, Journal of the Audio Engineering Society, Vol. 35, No. 12, December 1987.
1 Introduction This chapter describes the PCI-1200, lists what you need to get started, software programming choices, and optional equipment, and explains how to build custom cables and unpack the PCI-1200. About the PCI-1200 Thank you for purchasing the PCI-1200, a low-cost, high-performance multifunction analog, digital, and timing board for PCI bus computers.
Chapter 1 Introduction – NI-DAQ for Macintosh – NI-DAQ for PC compatibles – VirtualBench ❑ Your computer Unpacking Your PCI-1200 is shipped in an antistatic package to prevent electrostatic damage to the board. Electrostatic discharge can damage several components on the board. To avoid such damage in handling the board, take the following precautions: • Ground yourself via a grounding strap or by holding a grounded object.
Chapter 1 Introduction LabVIEW. The LabVIEW Data Acquisition VI Library is functionally equivalent to the NI-DAQ software. LabWindows/CVI features interactive graphics, a state-of-the-art user interface, and uses the ANSI standard C programming language. The LabWindows/CVI Data Acquisition Library, a series of functions for using LabWindows/CVI with National Instruments DAQ hardware, is included with the NI-DAQ software kit.
Chapter 1 Introduction minimal modifications to your code. Whether you are using conventional programming languages, LabVIEW, LabWindows/CVI, or other application software, your application uses the NI-DAQ driver software, as illustrated in Figure 1-1. Conventional Programming Environment ComponentWorks, LabVIEW, LabWindows/CVI, or VirtualBench NI-DAQ Driver Software DAQ or SCXI Hardware Personal Computer or Workstation Figure 1-1.
Chapter 1 Introduction Optional Equipment National Instruments offers a variety of products to use with your PCI-1200 board, including cables, connector blocks, and other accessories, as follows: • Cables and cable assemblies • Connector blocks, 50-pin screw terminals • SCXI modules and accessories for isolating, amplifying, exciting, and multiplexing signals for relays and analog output. With SCXI you can condition and acquire up to 3,072 channels.
Chapter 1 Introduction The mating connector for the PCI-1200 is a 50-position, polarized, ribbon socket connector with strain relief. National Instruments uses a polarized (keyed) connector to prevent inadvertent upside-down connection to the PCI-1200.
2 Installation and Configuration This chapter describes how to install and configure your PCI-1200. Software Installation If you are using NI-DAQ, or National Instruments application software, refer to the installation instructions in your software documentation to install and configure your software. If you are a register-level programmer, refer to the PCI-1200 Register-Level Programmer Manual. Hardware Installation The PCI-1200 can be installed in any unused PCI expansion slot in your computer.
Chapter 2 Installation and Configuration Board Configuration The PCI-1200 is completely software configurable. The PCI-1200 is fully compliant with the PCI Local Bus Specification, Revision 2.0. Therefore, all board resources are automatically allocated by the system. For the PCI-1200, this allocation includes the base memory address and interrupt level. You do not need to perform any configuration steps after the system powers up.
Chapter 2 Installation and Configuration Analog Output Polarity The PCI-1200 has two channels of analog output voltage at the I/O connector. You can configure each analog output channel for either unipolar or bipolar output. A unipolar configuration has a range of 0 to 10 V at the analog output. A bipolar configuration has a range of –5 to +5 V at the analog output. In addition, you can select the coding scheme for each D/A converter (DAC) as either two’s complement or straight binary.
Chapter 2 Installation and Configuration Table 2-2. Analog Input Modes for the PCI-1200 Analog Input Modes RSE Description RSE mode provides eight single-ended inputs with the negative input of the instrumentation amplifier referenced to analog ground (reset condition). NRSE NRSE mode provides eight single-ended inputs with the negative input of the instrumentation amplifier tied to AISENSE/AIGND and not connected to ground.
Chapter 2 Installation and Configuration Considerations for using the NRSE configuration are discussed in Chapter 3, Signal Connections. Notice that in this mode, the signal return path is through the negative terminal of the amplifier at the connector through the AISENSE/AIGND pin. DIFF Input (Four Channels) DIFF input means that each input signal has its own reference, and the difference between each signal and its reference is measured. The signal and its reference are each assigned an input channel.
3 Signal Connections This chapter describes how to make input and output signal connections to the PCI-1200 board via the board I/O connector and details the I/O timing specifications. The I/O connector for the PCI-1200 has 50 pins that you can connect to 50-pin accessories. I/O Connector Figure 3-1 shows the pin assignments for the PCI-1200 I/O connector. ! Caution Connections that exceed any of the maximum ratings of input or output signals on the PCI-1200 may damage the PCI-1200 and the computer.
Chapter 3 Signal Connections ACH0 ACH2 ACH4 ACH6 AISENSE/AIGND AGND DGND PA1 PA3 PA5 PA7 PB1 PB3 PB5 PB7 PC1 PC3 PC5 PC7 EXTUPDATE* OUTB0 OUTB1 CLKB1 GATB2 +5 V 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 ACH1 ACH3 ACH5 ACH7 DAC0OUT DAC1OUT PA0 PA2 PA4 PA6 PB0 PB2 PB4 PB6 PC0 PC2 PC4 PC6 EXTTRIG EXTCONV* GATB0 GATB1 OUTB2 CLKB2 DGND Figure 3-1.
Chapter 3 Signal Connections Table 3-1. Signal Descriptions for PCI-1200 I/O Connector Pins Pin Signal Name Direction Reference Description 1-8 ACH<7..0> AI AGND Analog Channel 7 through 0—Analog input channels 0 through 7. 9 AISENSE/AIGND I/O AGND Analog Input Sense/Analog Input Ground—Connected to AGND in RSE mode, analog input sense in NRSE mode. 10 DAC0OUT AO AGND Digital-to-Analog Converter 0 Output—Voltage output signal for analog output channel 0.
Chapter 3 Signal Connections Table 3-1. Signal Descriptions for PCI-1200 I/O Connector Pins (Continued) Pin Signal Name Direction Reference Description 40 EXTCONV* DIO DGND External Convert—External control signal to time A/D conversions (DI) and drive SCANCLK when you use SCXI (DO). 41 OUTB0 DO DGND Output B0—Digital output signal of counter B0. 42 GATB0 DI DGND Gate B0—External control signal for gating counter B0.
Chapter 3 Signal Connections Analog Input Signal Connections Pins 1 through 8 are analog input signal pins for the 12-bit ADC. Pin 9, AISENSE/AIGND, is an analog common signal. You can use this pin for a general analog power ground tie to the PCI-1200 in RSE mode or as a return path in NRSE mode. Pin 11, AGND, is the bias current return point for differential measurements. Pins 1 through 8 are tied to the eight single-ended analog input channels of the input multiplexer through 4.7 kΩ series resistors.
Chapter 3 Signal Connections Table 3-3. Unipolar Analog Input Signal Range Versus Gain 5 0 to 1.99951 V 10 0 to 999.756 mV 20 0 to 499.877 mV 50 0 to 199.951 mV 20 0 to 99.975 mV How you connect analog input signals to the PCI-1200 depends on how you configure the PCI-1200 analog input circuitry and the type of input signal source. With different PCI-1200 configurations, you can use the PCI-1200 instrumentation amplifier in different ways.
Chapter 3 Signal Connections grounded source, you must use a nonreferenced input connection at the PCI-1200. Types of Signal Sources When configuring the input mode of the PCI-1200 and making signal connections, first determine whether the signal source is floating or ground referenced. These two types of signals are described as follows. Floating Signal Sources A floating signal source is not connected in any way to the building ground system but has an isolated ground-reference point.
Chapter 3 Signal Connections and ground-referenced signal sources. Table 3-4 summarizes the recommended input configurations for both types of signal sources. Table 3-4.
Chapter 3 Signal Connections Differential Connection Considerations (DIFF Configuration) Differential connections are those in which each PCI-1200 analog input signal has its own reference signal or signal return path. These connections are available when you configure the PCI-1200 in the DIFF mode. Each input signal is tied to the positive input of the instrumentation amplifier, and its reference signal, or return, is tied to the negative input of the instrumentation amplifier.
Chapter 3 Signal Connections Differential Connections for Grounded Signal Sources Figure 3-3 shows how to connect a ground-referenced signal source to a PCI-1200 board configured for DIFF input. Configuration instructions are in the Analog I/O Configuration section in Chapter 2, Installation and Configuration.
Chapter 3 Signal Connections Differential Connections for Floating Signal Sources Figure 3-4 shows how to connect a floating signal source to a PCI-1200 board configured for DIFF input. Configuration instructions are in the Analog I/O Configuration section of Chapter 2, Installation and Configuration.
Chapter 3 Signal Connections resulting in uncontrollable drift and possible saturation in the amplifier. Typically, values from 10 kΩ to 100 kΩ are used. A resistor from each input to ground, as shown in Figure 3-4, provides bias current return paths for an AC-coupled input signal. If the input signal is DC-coupled, you need only the resistor that connects the negative signal input to ground. This connection does not lower the input impedance of the analog input channel.
Chapter 3 Signal Connections Single-Ended Connections for Floating Signal Sources (RSE Configuration) Figure 3-5 shows how to connect a floating signal source to a PCI-1200 board configured for RSE mode. Configure the PCI-1200 analog input circuitry for RSE input to make these types of connections. Configuration instructions are in the Analog I/O Configuration section of Chapter 2, Installation and Configuration.
Chapter 3 Signal Connections RSE configuration, this difference in ground potentials appears as an error in the measured voltage. Figure 3-6 shows how to connect a grounded signal source to a PCI-1200 board configured in the NRSE configuration. Configuration instructions are included in the Analog I/O Configuration section in Chapter 2, Installation and Configuration.
Chapter 3 Signal Connections The common-mode input range for the PCI-1200 depends on the size of the differential input signal (Vdiff = V+in – V–in) and the gain setting of the instrumentation amplifier. In unipolar mode, the differential input range is 0 to 10 V. In bipolar mode, the differential input range is –5 to +5 V. Inputs should remain within a range of –5 to 10 V in both bipolar and unipolar modes.
Chapter 3 Signal Connections Figure 3-7 shows how to make analog output signal connections. 10 DAC0OUT Channel 0 + Load VOUT 0 – 11 AGND – Load VOUT 1 + 12 DAC1OUT Channel 1 Analog Output Channels I/O Connector PCI-1200 Figure 3-7. Analog Output Signal Connections Digital I/O Signal Connections Pins 13 through 37 of the I/O connector are digital I/O signal pins. Digital I/O on the PCI-1200 uses the 82C55A integrated circuit.
Chapter 3 Signal Connections Logical Inputs and Outputs • Absolute max voltage rating –0.5 to +5.5 V with respect to DGND • Digital I/O lines: – Input logic low voltage –0.3 V min 0.8 V max – Input logic high voltage 2.2 V min 5.3 V max – Output logic low voltage (at output current = 2.5 mA) – Output logic high voltage (at output current = –2.5 mA) 3.7 V min – Input leakage current (0 < Vin < 5 V) –1 µA min — 0.
Chapter 3 Signal Connections Figure 3-8. Digital output applications include sending TTL signals and driving external devices such as the LED shown in Figure 3-8. Port C Pin Connections The signals assigned to port C depend on the mode in which the 82C55A is programmed. In mode 0, port C is considered to be two 4-bit I/O ports. In modes 1 and 2, port C is used for status and handshaking signals with two or three I/O bits mixed in.
Chapter 3 Signal Connections timing, and the other, 82C53(B), is available for general use. Use pins 38 through 40 and pin 43 to carry external signals for DAQ timing. These signals are explained in the next section, DAQ Timing Connections. Pins 41 through 48 carry general purpose timing signals from 82C53(B). These signals are explained in the General Purpose Timing Signal Connections section later in this chapter. DAQ Timing Connections Each 82C53 counter/timer circuit contains three counters.
Chapter 3 Signal Connections of EXTCONV*. Further transitions on the EXTTRIG line have no effect until a new DAQ sequence is established. Figure 3-10 shows a possible controlled DAQ sequence using EXTCONV* and EXTTRIG. The rising edge of EXTCONV* that enables external conversions must occur a minimum of 50 ns after the rising edge of EXTTRIG. The first conversion occurs on the next falling edge of EXTCONV*. tw VIH EXTTRIG tw 50 ns minimum td 50 ns minimum tw VIL td EXTCONV* CONVERT Figure 3-10.
Chapter 3 Signal Connections tw VIH EXTTRIG tw 50 ns minimum tw VIL EXTCONV* CONVERT Figure 3-11. Pretrigger DAQ Timing For interval scanning data acquisition, counter B1 determines the scan interval. Instead of using counter B1, you can externally time the scan interval through OUTB1. If you externally time the sample interval, we recommend that you also externally time the scan interval. Figure 3-12 shows an example of an interval scanning DAQ operation.
Chapter 3 Signal Connections OUTB1 tw = 50 ns td = 50 ns EXTCONV* CONVERT GATE ADC CH CH1 CH1 CH0 CH0 Figure 3-12. Interval-Scanning Signal Timing You use the final external control signal, EXTUPDATE*, to externally control updating the output voltage of the 12-bit DACs and/or to generate an externally timed interrupt. There are two update modes, immediate update and delayed update. In immediate update mode the analog output is updated as soon as a value is written to the DAC.
Chapter 3 EXTUPDATE* Signal Connections tw DAC OUTPUT UPDATE CNTINT DACWRT tw Minimum 50 ns Figure 3-13. EXTUPDATE* Signal Timing for Updating DAC Output The absolute max voltage input rating for the EXTCONV*, EXTTRIG, OUTB1, and EXTUPDATE* signals is –0.5 to 5.5 V with respect to DGND. For more information concerning the various modes of data acquisition and analog output, refer to your NI-DAQ documentation or to Chapter 4, Theory of Operation, in this manual.
Chapter 3 Signal Connections +5 V 100 kΩ CLK OUT GATE Switch Signal Source Counter (from Group B) 13 DGND I/O Connector PCI-1200 Figure 3-14. Event-Counting Application with External Switch Gating Pulse-width measurement is performed by level gating. The pulse you want to measure is applied to the counter GATE input. The counter is loaded with the known count and is programmed to count down while the signal at the GATE input is high.
Chapter 3 Signal Connections generate the gate signal in this application. If you use a second counter, however, you must externally invert the signal. +5 V 100 kΩ CLK OUT GATE Signal Source Gate Source Counter 13 DGND I/O Connector PCI-1200 Figure 3-15. Frequency Measurement Application The GATE, CLK, and OUT signals for counters B1 and B2 are available at the I/O connector. The GATE and CLK pins are internally pulled up to +5 V through a 100 kΩ resistor.
Chapter 3 Signal Connections • 82C53 digital output specifications (referenced to DGND): – Voh output logic high voltage – Vol output logic low voltage – – 3.7 V min — 0.45 V max Ioh output source current, at Voh — — –0.92 mA max Iol output sink current, at Vol — 2.1 mA max Figure 3-16 shows the timing requirements for the GATE and CLK input signals and the timing specifications for the 82C53 OUT output signals.
Chapter 3 Signal Connections Timing Specifications Use the handshaking lines STB* and IBF to synchronize input transfers. Use the handshaking lines OBF* and ACK* to synchronize output transfers. The following signals are used in the mode timing diagrams: Table 3-6. Signal Names Used in Timing Diagrams Name Type Description STB* Input Strobe Input—A low signal on this handshaking line loads data into the input latch.
Chapter 3 Signal Connections Mode 1 Input Timing The timing specifications for an input transfer in mode 1 are as follows: T1 T2 T4 STB * T7 IBF T6 INTR RD * T3 T5 DATA Name Description Minimum Maximum T1 STB* pulse width 500 — T2 STB* = 0 to IBF = 1 — 300 T3 Data before STB* = 1 0 — T4 STB* = 1 to INTR = 1 — 300 T5 Data after STB* = 1 180 — T6 RD* = 0 to INTR = 0 — 400 T7 RD* = 1 to IBF = 0 — 300 All timing values are in nanoseconds. Figure 3-17.
Chapter 3 Signal Connections Mode 1 Output Timing The timing specifications for an output transfer in mode 1 are as follows: T3 WRT* T4 OBF* T1 T6 INTR T5 ACK* DATA T2 Name Description Minimum Maximum T1 WRT* = 0 to INTR = 0 — 450 T2 WRT* = 1 to output — 350 T3 WRT* = 1 to OBF* = 0 — 650 T4 ACK* = 0 to OBF* = 1 — 350 T5 ACK* pulse width 300 — T6 ACK* = 1 to INTR = 1 — 350 All timing values are in nanoseconds. Figure 3-18.
Chapter 3 Signal Connections Mode 2 Bidirectional Timing The timing specifications for bidirectional transfers in mode 2 are as follows: T1 WRT * T6 OBF * INTR T7 ACK * T3 STB * T10 T4 IBF RD * T2 T5 T8 T9 DATA Name Description Minimum Maximum T1 WRT* = 1 to OBF* = 0 — 650 T2 Data before STB* = 1 0 — T3 STB* pulse width 500 — T4 STB* = 0 to IBF = 1 — 300 T5 Data after STB* = 1 180 — T6 ACK* = 0 to OBF* = 1 — 350 T7 ACK* pulse width 300 — T8 ACK* = 0 to outpu
4 Theory of Operation This chapter explains the operation of each functional unit of the PCI-1200. Functional Overview The block diagram in Figure 4-1 shows a functional overview of the PCI-1200 board.
Chapter 4 Theory of Operation • Digital I/O circuitry • Calibration circuitry The internal data and control buses interconnect the components. The rest of this chapter explains the theory of operation of each of the PCI-1200 components. Calibration circuitry is discussed in Chapter 5, Calibration. PCI Interface Circuitry The PCI-1200 interface circuitry consists of the MITE PCI interface chip and a digital control logic chip.
Chapter 4 Theory of Operation The PCI-1200 generates an interrupt in the following five cases (each of these interrupts is individually enabled and cleared): • When a single A/D conversion can be read from the A/D FIFO memory. • When the A/D FIFO is half-full. • When a DAQ operation completes, including when either an OVERFLOW or an OVERRUN error occurs. • When the digital I/O circuitry generates an interrupt. • When a rising edge signal is detected on the DAC update signal.
Chapter 4 Theory of Operation GATEB2 CLKB2 GATEB2 General Purpose Counter CLKB2 OUTB2 OUTB2 1 MHz Source OUTB0 MUX 37 Interface Control 5 Data 6 Error Reporting 8 Control 2 Arbitration PCI Bus Address MITE PCI Interface Chip 2 System 2 Interrupt 1 4 Interrupt CTR RD Digital Control Logic Scan Interval/ General Purpose Counter MUX CLKB1 CLKA0 OUTB1 OUTB1 OUTB0 GATEB0 OUTB0 GATEB0 Timebase Extension/ General Purpose Counter CTR WRT Data 8 1 2 MHz Source CLKB0 DRQ CLKA0 1 GAT
Chapter 4 Theory of Operation timing, or you can use the three external timing signals, EXTCONV*, EXTTRIG, and EXTUPDATE*, for DAQ and DAC timing. The second group of counter/timers is called group B and includes B0, B1, and B2. You can use counters B0 and B1 for internal DAQ and DAC timing, or you can use the external timing signal CLKB1 for analog input timing. If you are not using counters B0 and B1 for internal timing, you can use these counters as general purpose counter/timers.
Chapter 4 Theory of Operation Analog Input Circuitry The analog input circuitry consists of two analog input multiplexers, multiplexer (mux) counter/gain select circuitry, a software-programmable gain amplifier, a 12-bit ADC, and a 16-bit sign-extended FIFO memory. One of the input multiplexers has eight analog input channels (channels 0 through 7). The other multiplexer is connected to channels 1, 3, 5, and 7 for differential mode.
Chapter 4 Theory of Operation Stanley P. Lipshitz, Journal of the Audio Engineering Society, Vol. 35, No. 12, Dec. 1987. The PCI-1200 uses a 12-bit successive-approximation ADC. The converter’s 12-bit resolution allows it to resolve its input range into 4,095 different steps. The ADC has an input range of ±5 V and 0 to 10 V. When an A/D conversion is complete, the ADC clocks the result into the A/D FIFO. The A/D-FIFO is 16 bits wide and 4,096 words deep. This FIFO serves as a buffer to the ADC.
Chapter 4 Theory of Operation counts the total number of samples taken during a controlled operation, or through software control in a freerun operation. Controlled Acquisition Mode The PCI-1200 uses two counters, counter A0 and counter A1, to execute DAQ operations in controlled acquisition mode. Counter A0 counts sample intervals, while counter A1 counts samples.
Chapter 4 Theory of Operation repeat this process every 65 ms, then you should define the operation as follows: • Start channel: ch1 (which gives a scan sequence of “ch1, ch0”) • Sample interval: 12 µs • Scan interval: 65 ms The first channel will not be sampled until one sample interval from the scan interval pulse. Since the A/D conversion time is 10 µs, your sample interval must be at least this value to ensure proper operation.
Chapter 4 Theory of Operation DAQ Rates Maximum DAQ rates (number of samples per second) are determined by the conversion period of the ADC plus the sample-and-hold acquisition time. During multichannel scanning, the DAQ rates are further limited by the settling time of the input multiplexers and programmable gain amplifier.
Chapter 4 Theory of Operation The recommended DAQ rates in Table 4-2 assume that voltage levels on all the channels included in the scan sequence are within range for the given gain and are driven by low-impedance sources. Analog Output The PCI-1200 has two channels of 12-bit D/A output. Each analog output channel can provide unipolar or bipolar output. The PCI-1200 also contains timing circuitry for waveform generation timed either externally or internally. Figure 4-5 shows the analog output circuitry.
Chapter 4 Theory of Operation voltage increment corresponding to an LSB change in the digital code word. For both outputs: 10V 1LSB = --------------4, 095 DAC Timing There are two modes in which you can update the DAC voltages. In immediate update mode, the DAC output voltage is updated as soon as you write to the corresponding DAC. In delayed update mode, the DAC output voltage does not change until a low level is detected either from counter A2 of the timing circuitry or EXTUPDATE*.
Chapter 4 Theory of Operation All three ports on the 82C55A are TTL-compatible. When enabled, the digital output ports are capable of sinking 2.5 mA of current and sourcing 2.5 mA of current on each digital I/O line. When the ports are not enabled, the digital I/O lines act as high-impedance inputs.
5 Calibration This chapter discusses the calibration procedures for the PCI-1200 analog I/O circuitry. However, the PCI-1200 is factory calibrated, and National Instruments can recalibrate your unit if needed. To maintain the 12-bit accuracy of the PCI-1200 analog input and analog output circuitry, recalibrate at 6-month intervals. There are four ways to perform calibrations. • If you have LabVIEW, use the 1200 Calibrate VI. This VI is located in the Calibration and Configuration palette.
Chapter 5 Calibration If you use the PCI-1200 with NI-DAQ, LabVIEW, LabWindows/CVI, or other application software, the factory calibration constants are automatically loaded into the calibration DAC the first time a function pertaining to the PCI-1200 is called, and again each time you change your configuration (which includes gain).
Chapter 5 Calibration Using the Calibration Function The Calibrate_1200 function and the 1200 Calibrate VI can either load the calibration DACs with the factory constants or the user-defined constants stored in the EEPROM, or you can perform your own calibration and directly load these constants into the calibration DACs.
A Specifications This appendix lists the PCI-1200 specifications. These specifications are typical at 25° C unless otherwise stated. Analog Input Input Characteristics Number of channels ............................... Eight single-ended, eight pseudodifferential or four differential, software selectable Type of ADC.......................................... Successive approximation Resolution .............................................. 12 bits, 1 in 4,096 Max sampling rate.............................
Appendix A Specifications Max working voltage..............................In DIFF or NRSE (signal + common mode) ........................mode, the negative input/AISENSE should remain within ±5 V of AGND (bipolar), or –5 to 2 V (unipolar). The positive input should remain within the –5 to +10 V range. Overvoltage protection ...........................±35 V powered on, ±25 V powered off Inputs protected ...............................ACH<0..7> FIFO buffer size......................................
Appendix A Specifications Powered off..................................... 4.7 kΩ min Overload.......................................... 4.7 kΩ min Input bias current ................................... ±100 pA Input offset current................................. ±100 pA CMRR ....................................................
Appendix A Specifications Offset temperature coefficient Pregain.............................................±15 µV/° C Postgain ...........................................±100 µV/° C Gain temperature coefficient ..................±40 ppm/° C Explanation of Analog Input Specifications Relative accuracy is a measure of the linearity of an ADC. However, relative accuracy is a tighter specification than a nonlinearity specification.
Appendix A Specifications System noise is the amount of noise seen by the ADC when there is no signal present at the input of the board. The amount of noise that is reported directly (without any analysis) by the ADC is not necessarily the amount of real noise present in the system, unless the noise is considerably greater than 0.5 LSB rms.
Appendix A Specifications gain amplifier. After the input multiplexers are switched, the amplifier must be allowed to settle to the new input signal value to within 12-bit accuracy. The settling time is a function of the gain selected. Analog Output Output Characteristics Number of channels................................Two voltage Resolution ...............................................12 bits, 1 in 4,096 Typical update rate .................................
Appendix A Specifications Power-on state........................................ 0 V Dynamic Characteristics Settling time to full-scale range (FSR) .. 5 µs Stability Offset temperature coefficient ............... ±50 µV/° C Gain temperature coefficient.................. ±30 ppm/° C Explanation of Analog Output Specifications Relative accuracy in a D/A system is the same as nonlinearity because no uncertainty is added due to code width.
Appendix A Specifications Output low voltage (IOUT = 2.5 mA) — 0.4 V Output high voltage (IOUT = –40 µA) (IOUT = –2.5 mA) 4.2 V 3.7 V — — Power-on state ........................................All ports mode 0 input Protection................................................–0.5 to 5.5 V powered on, ±0.5 V powered off Data transfers ..........................................Interrupts, programmed I/O Timing I/O Number of channels................................3 counter/timers Protection............
Appendix A Level Specifications Min Max Output low voltage (IOUT = 2.1 mA) — 0.45 V Output high voltage (IOUT = -0.92 mA) 3.7 V — Protection ............................................... –0.5 to 5.5 V powered on, ±0.5 V powered off Data transfer ........................................... Interrupts, programmed I/O Digital Trigger Compatibility ......................................... TTL Response ................................................ Rising edge Pulse width .......................
Customer Communication B For your convenience, this appendix contains forms to help you gather the information necessary to help us solve your technical problems and a form you can use to comment on the product documentation. When you contact us, we need the information on the Technical Support Form and the configuration form, if your manual contains one, about your system configuration to answer your questions as quickly as possible.
Fax-on-Demand Support Fax-on-Demand is a 24-hour information retrieval system containing a library of documents on a wide range of technical information. You can access Fax-on-Demand from a touch-tone telephone at 512 418 1111. E-Mail Support (Currently USA Only) You can submit technical support questions to the applications engineering team through e-mail at the Internet address listed below. Remember to include your name, address, and phone number so we can contact you with solutions and suggestions.
Technical Support Form Photocopy this form and update it each time you make changes to your software or hardware, and use the completed copy of this form as a reference for your current configuration. Completing this form accurately before contacting National Instruments for technical support helps our applications engineers answer your questions more efficiently.
PCI-1200 Hardware and Software Configuration Form Record the settings and revisions of your hardware and software on the line to the right of each item. Complete a new copy of this form each time you revise your software or hardware configuration, and use this form as a reference for your current configuration. Completing this form accurately before contacting National Instruments for technical support helps our applications engineers answer your questions more efficiently.
Documentation Comment Form National Instruments encourages you to comment on the documentation supplied with our products. This information helps us provide quality products to meet your needs. Title: PCI-1200 User Manual Edition Date: July 1998 Part Number: 320942C-01 Please comment on the completeness, clarity, and organization of the manual.
Glossary Prefix Meanings Value p- pico 10 –12 n- nano- 10 –9 µ- micro- 10 – 6 m- milli- 10 –3 k- kilo- 10 3 M- mega- 10 6 G- giga- 10 9 Numbers/Symbols ° degrees > greater than ≥ greater than or equal to < less than – negative of, or minus ≠ not equal to Ω ohms % percent ± plus or minus + positive of, or plus +5 V +5 Volts signal © National Instruments Corporation G-1 PCI-1200 User Manual
Glossary A A amperes AC alternating current ACH <0..
Glossary D D/A digital-to-analog DAC digital-to-analog converter—an electronic device, often an integrated circuit, that converts a digital number into a corresponding analog voltage or current DAC OUTPUT UPDATE DAC output update signal DAC0OUT, DAC1OUT digital-to-analog converter 0, 1 output signals DACWRT DAC write signal DAQ data acquisition—a system that uses the computer to collect, receive, and generate electrical signals DATA data lines at the specified port signal dB decibel—the unit
Glossary EXTCONV* external convert signal EXTTRIG external trigger signal EXTUPDATE* external update signal F F farad FIFO first in first out memory buffer FSR full-scale range ft feet G GATB <0..2> counter B0, B1, B2 gate signals GATE gate signal H hex hexadecimal Hz hertz I IBF input buffer full signal in.
Glossary L LED light-emitting diode LSB least significant bit M m meters max maximum MB megabytes of memory min. minutes min minimum MIO multifunction I/O MSB most significant bit mux multiplexer—a switching device with multiple inputs that connects one of its inputs to its output.
Glossary P PA, PB, PC <0..7> port A, B, or C 0 through 7 signals PCI Peripheral Component Interconnect—a high-performance expansion bus architecture originally developed by Intel to replace ISA and EISA. It is achieving widespread acceptance as a standard for PCs and work-stations; it offers a theoretical maximum transfer rate of 132 Mbytes/s.
Glossary S samples scan one or more analog or digital input samples. Typically, the number of input samples in a scan is equal to the number of channels in the input group. For example, one pulse from the scan clock produces one scan which acquires one new sample from every analog input channel in the group.
Glossary V V volts Vin positive/negative input voltage Vcm common-mode noise VDC volts direct current Vdiff differential input voltage VEXT external voltage VI virtual instrument—(1) a combination of hardware and/or software elements, typically used with a PC, that has the functionality of a classic stand-alone instrument (2) a LabVIEW software module (VI), which consists of a front panel user interface and a block diagram program VIH volts, input high VIL volts, input low Vm measured vo
Index A analog input configuration, 2-2 to 2-5 analog I/O settings (table), 2-2 differential connections purpose and use, 3-9 recommended input configurations (table), 3-8 floating signal sources differential connections, 3-11 to 3-12 recommended input configurations (table), 3-8 ground-referenced signal sources differential connections, 3-10 recommended input configurations (table), 3-8 input modes, 2-3 to 2-5 input polarity, 2-3 analog input modes, 2-3 to 2-5 DIFF. See also differential connections.
Index analog input signal connections bipolar signal range vs.
Index input polarity, 2-3 analog output polarity, 2-3 controlled acquisition mode, 4-8 Counter 0 on 82C53(A) counter/timer, 3-19 Counter 1 on 82C53(A) counter/timer, 3-19 counter/timers, 4-3 to 4-5 circuitry (figure), 4-4 custom cabling, 1-5 to 1-6 customer communication, xii, B-1 to B-2 EXTTRIG signal, 3-19 to 3-20 EXTUPDATE* signal, 3-22 to 3-23 interval scanning, 3-21 pins, 3-18 to 3-19 posttrigger and pretrigger modes, 3-19 to 3-20 posttrigger timing (figure), 3-20 pretrigger timing (figure), 3-21 dat
Index purpose and use, 3-7 recommended input configurations (table), 3-8 single-ended connections (RSE configuration), 3-13 freerun acquisition mode, 4-8 frequency measurement connections for measurement application (figure), 3-25 general-purpose timing signal connections, 3-24 to 3-25 FTP support, B-1 analog output, A-7 documentation conventions used in manual, x National Instruments documentation set, xi organization of manual, ix related documentation, xii E EEPROM contents, 5-1 to 5-2 electronic supp
Index recommended input configurations (table), 3-8 single-ended connections (NRSE configuration), 3-13 to 3-14 multiple-channel scanned data acquisition, 4-9 multiplexers, analog input, 4-6 mux counters, 4-6 N I NI-DAQ driver software, 1-3 to 1-4 noise, system, A-5 NRSE input configuration, 2-4 to 2-5 definition (table), 2-4 recommended input configurations (table), 3-8 single-ended connections for ground-referenced signal sources, 3-13 to 3-14 IBF signal (table), 3-27 INL (integral nonlinearity), A-
Index PCI-1200 block diagram, 4-1 configuration. See configuration. custom cabling, 1-5 to 1-6 features, 1-1 installation, 2-1 optional equipment, 1-5 requirements for getting started, 1-1 to 1-2 software programming choices National Instruments application software, 1-2 to 1-3 NI-DAQ driver software, 1-3 to 1-4 register-level programming, 1-4 theory of operation. See theory of operation.
Index T pins, 3-18 to 3-19 timing specifications, 3-27 to 3-30 digital I/O signal connections, 3-16 to 3-18 logical inputs and outputs, 3-17 to 3-18 Port C pin connections, 3-18 I/O connector exceeding maximum ratings (caution), 3-1 pin assignments (figure), 3-2 power connections, 3-18 signal descriptions (table), 3-3 to 3-4 single-channel data acquisition, 4-9 single-ended connections floating signal sources (RSE configuration), 3-13 ground-referenced signal sources (NRSE configuration), 3-13 to 3-14 pur
Index general-purpose timing signal connections event-counting, 3-23 with external switch gating (figure), 3-24 frequency measurement, 3-24 to 3-25 connections for measurement application (figure), 3-25 GATE, CLK, and OUT signals, 3-23 to 3-26 pins, 3-18 to 3-19 pulse-width measurement, 3-24 specifications and ratings, 3-25 to 3-26 square wave generation, 3-23 time-lapse measurement, 3-24 timing requirements for GATE, CLK, and OUT signals (figure), 3-26 timing specifications, 3-27 to 3-30 mode 1 input timi
