Reconfigurable I/O NI PXI-7831R User Manual Reconfigurable I/O Devices for PXI/CompactPCI Bus Computers NI PXI-7831R User Manual April 2003 Edition Part Number 370489A-01
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Important Information Warranty The NI PXI-7831R is warranted against defects in materials and workmanship for a period of one year from the date of shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period. This warranty includes parts and labor.
Compliance FCC/Canada Radio Frequency Interference Compliance Determining FCC Class The Federal Communications Commission (FCC) has rules to protect wireless communications from interference. The FCC places digital electronics into two classes. These classes are known as Class A (for use in industrial-commercial locations only) or Class B (for use in residential or commercial locations). All National Instruments (NI) products are FCC Class A products.
Contents About This Manual Conventions ...................................................................................................................vii Reconfigurable I/O Documentation...............................................................................viii Related Documentation..................................................................................................viii Chapter 1 Introduction About the Reconfigurable I/O Devices......................................................
Contents Differential Connections for Ground-Referenced Signal Sources ... 2-8 Differential Connections for Nonreferenced or Floating Signal Sources ................................................................. 2-9 Single-Ended Connection Considerations ...................................................... 2-11 Single-Ended Connections for Floating Signal Sources (RSE Input Mode).................................................
About This Manual This manual describes the electrical and mechanical aspects of the National Instruments PXI-7831R device and contains information concerning its operation and programming. The NI PXI-7831R device is a Reconfigurable I/O (RIO) device. The NI PXI-7831R contains eight independent, 16-bit analog input (AI) channels, eight independent, 16-bit analog output (AO) channels, and 96 digital I/O (DIO) lines.
About This Manual programs, subprograms, subroutines, device names, functions, operations, variables, filenames and extensions, and code excerpts. Reconfigurable I/O Documentation The NI PXI-7831R User Manual is one piece of the documentation set for your RIO system and application. Depending on the hardware and software you use for your application, you could have any of several types of documentation.
1 Introduction This chapter describes the NI PXI-7831R, describes the concept of the Reconfigurable I/O (RIO) device, lists what you need to get started, describes the optional software and optional equipment, explains how to unpack the hardware, and contains safety information about the NI PXI-7831R. About the Reconfigurable I/O Devices Thank you for purchasing the NI PXI-7831R.
Chapter 1 Introduction The PXI chassis has the Real-Time System Integration (RTSI) bus to easily synchronize several measurement functions to a common trigger or timing event. The RTSI bus is implemented on the PXI trigger bus on the PXI backplane. The RTSI bus can route timing and trigger signals between as many as seven PXI devices in your system. Refer to Appendix A, Specifications, for detailed specifications of the RIO device.
Chapter 1 Introduction Table 1-1. Pins Used by the NI PXI-7831R NI PXI-7831R Signal PXI Pin Name PXI J2 Pin Number PXI Trigger<0..7> PXI Trigger<0..7> A16, A17, A18, B15, B18, C18, E16, E18 PXI Clock 10 MHz PXI Clock 10 MHz E17 PXI Star Trigger PXI Star Trigger D17 LBLSTAR<0..12> LBL<0..12> A1, A19, C1, C19, C20, D1, D2, D15, D19, E1, E2, E19, E20 LBR<0..12> LBR<0..
Chapter 1 Introduction ❑ The following documents are included on the NI Device Drivers CD and are also available at ni.com/manuals (optional): – LabVIEW FPGA Module Release Notes – LabVIEW FPGA Module User Manual – Where to Start with the NI PXI-7831R ❑ The LabVIEW Help, which is available by selecting Help»VI, Function, & How-To Help from LabVIEW.
Chapter 1 Introduction ❑ The following documents are included on the NI Device Drivers CD and are also available at ni.com/manuals (optional): – LabVIEW FPGA Module Release Notes – LabVIEW FPGA Module User Manual – LabVIEW Real-Time Module User Manual – Where to Start with the NI PXI-7831R ❑ The LabVIEW Help, which is available by selecting Help»VI, Function, & How-To Help from LabVIEW.
Chapter 1 Introduction User-Defined I/O Resources With the RIO device, you can define both the combination of I/O resources and the I/O resources themselves. You can also create new building blocks on top of fixed I/O resources. For example, one application might require an event counter that increments when a rising edge appears on any of three digital input lines. Another application might require a digital line to be asserted once an analog input exceeds a programmable threshold.
Chapter 1 Introduction the connectivity between the bus interface and the fixed I/O, including any timing, triggering, processing, and custom I/O required by the application. Timing, triggering, processing, and custom I/O is provided by consuming logic in the FPGA. Each fixed I/O resource used by the application consumes a small portion of the FPGA logic, which is used to perform basic control of the fixed I/O resource.
Chapter 1 Introduction Counter DIO<0..7> Bus Interface PID AO0 Figure 1-3. FPGA Logic Use in an Application with Higher-Level Functions The FPGA is volatile and does not retain the VI when it is powered off. Therefore, the VI must be reloaded every time power is turned on. The VI comes from onboard flash memory or from the software over the bus interface.
Chapter 1 Introduction FPGA Module The FPGA Module enables you to use LabVIEW to create VIs that run on the RIO device, which contains a reconfigurable FPGA. The FPGA Module includes a new function palette, which contains functions that run on the FPGA on the RIO device. These functions can control the I/O, timing, and logic of the RIO device and can generate interrupts for synchronization. The FPGA Module synthesizes a VI into a form that can be downloaded to the FPGA on the RIO device.
Chapter 1 Introduction Table 1-2. Cables and Accessories Cable SH68-C68-S Cable Description Accessories Shielded 68-pin VHDCI male connector to female 0.050 series D-type connector. The cable is constructed with 34 twisted wire pairs plus an overall shield. Connects to the following standard 68-pin screw terminal blocks: • SCB-68 • CB-68LP • CB-68LPR • TBX-68 NSC68-262650 Non-shielded cable connects from 68-pin VHDCI male connector to two 26-pin female headers plus one 50-pin female header.
Chapter 1 Introduction SHC68-NT-S (NI part #189041-02) connects to the NI PXI-7831R VHDCI connectors on one end of the cable. The other end of the cable is not terminated. This cable ships with a wire list identifying which wire corresponds to which NI PXI-7831R pin. Using this cable, you can quickly connect the NI PXI-7831R signals that you need to the connector of your choice without having to connect these signals to the VHDCI connector end of the cable.
Chapter 1 Introduction Do not substitute parts or modify the NI PXI-7831R except as described in this document. Use the NI PXI-7831R only with the chassis, modules, accessories, and cables specified in the installation instructions. You must have all covers and filler panels installed during operation of the NI PXI-7831R. Do not operate the NI PXI-7831R in an explosive atmosphere or where there may be flammable gases or fumes.
Chapter 1 Introduction standard impulse withstand voltage levels that commonly occur in electrical distribution systems. The following is a description of installation categories: 1 • Installation Category I is for measurements performed on circuits not directly connected to the electrical distribution system referred to as MAINS1 voltage. This category is for measurements of voltages from specially protected secondary circuits.
2 Hardware Overview of the NI PXI-7831R This chapter presents an overview of the hardware functions and I/O connectors on the NI PXI-7831R. Figure 2-1 shows a block diagram for the NI PXI-7831R, and Figure 2-2 shows the parts locator diagrams for the NI PXI-7831R.
Chapter 2 Hardware Overview of the NI PXI-7831R SW1 Figure 2-2. Parts Locator Diagram for the NI PXI-7831R Analog Input The NI PXI-7831R has eight independent, 16-bit AI channels that can be simultaneously sampled or sampled at different rates. The input mode is software configurable, and the input range is fixed at ±10 V. The converters return data in two’s complement format. Table 2-1 shows the ideal output code returned for a given AI voltage. Table 2-1.
Chapter 2 Hardware Overview of the NI PXI-7831R Table 2-1. Ideal Output Code and AI Voltage Mapping (Continued) AI Voltage Output Code (Hex) (Two’s Complement) Midscale 0.000000 0000 Negative full-scale range +1 LSB –9.999695 8001 Negative full-scale range –10.000000 8000 Output Code ---------------------------------- × 10.0 V 32,768 — Input Description Any input voltage Input Modes The NI PXI-7831R input mode is software configurable.
Chapter 2 Hardware Overview of the NI PXI-7831R Connecting Analog Input Signals The AI signals for the NI PXI-7831R are AI<0..7>+, AI<0..7>–, AIGND, and AISENSE. The AI<0..7>+ and AI<0..7>– signals are tied to the eight AI channels of the NI PXI-7831R. For all input modes, the AI<0..7>+ signals are connected to the positive input of the instrumentation amplifier on each channel.
Vin+ Chapter 2 Hardware Overview of the NI PXI-7831R Instrumentation Amplifier + + Vm – Vin– Measured Voltage – Vm = [Vin+ – Vin–] Figure 2-3. NI PXI-7831R Instrumentation Amplifier The instrumentation amplifier applies common-mode voltage rejection and presents high input impedance to the AI signals connected to the NI PXI-7831R. Signals are routed to the positive and negative inputs of the instrumentation amplifier through input multiplexers on the device.
Chapter 2 Hardware Overview of the NI PXI-7831R Floating Signal Sources A floating signal source is in no way connected to the building ground system but instead has an isolated ground-reference point. Some examples of floating signal sources are outputs of transformers, thermocouples, battery-powered devices, optical isolator outputs, and isolation amplifiers. An instrument or device that has an isolated output is a floating signal source.
Chapter 2 Hardware Overview of the NI PXI-7831R Signal Source Type Floating Signal Source (Not Connected to Building Ground) Grounded Signal Source Examples • Ungrounded Thermocouples • Signal Conditioning with Isolated Outputs • Battery Devices Examples • Plug-in Instruments with Nonisolated Outputs Input AI(+) + V 1 – AI(–) + – AI(+) + V 1 – + AI(–) – Differential (DIFF) AIGND AIGND See text for information on bias resistors.
Chapter 2 Hardware Overview of the NI PXI-7831R Differential Connection Considerations (DIFF Input Mode) In DIFF input mode, the NI PXI-7831R measures the difference between the positive and negative inputs. DIFF input mode is ideal for measuring ground-referenced signals from other devices. When using DIFF input mode, the input signal is tied to the positive input of the instrumentation amplifier, and its reference signal, or return, is tied to the negative input of the instrumentation amplifier.
Chapter 2 GroundReferenced Signal Source + Hardware Overview of the NI PXI-7831R AI+ + AI– Instrumentation Amplifier Vs – – + Vm – CommonMode Noise and Ground Potential Measured Voltage + Vcm x8 Channels AISENSE – AIGND I/O Connector DIFF Input Mode Selected Figure 2-5.
Chapter 2 Floating Signal Source Hardware Overview of the NI PXI-7831R + Vs Bias Resistors (see text) AI+ + AI– Instrumentation Amplifier – – + Vm – Bias Current Return Paths Measured Voltage x8 Channels AISENSE AIGND I/O Connector DIFF Input Mode Selected Figure 2-6. Differential Input Connections for Nonreferenced Signals Figure 2-6 shows two bias resistors connected in parallel with the signal leads of a floating signal source.
Chapter 2 Hardware Overview of the NI PXI-7831R the source, other than the very high-input impedance of the instrumentation amplifier. You can fully balance the signal path by connecting another resistor of the same value between the positive input and AIGND, as shown in Figure 2-6. This fully balanced input mode offers slightly better noise rejection but has the disadvantage of loading the source down with the series combination (sum) of the two resistors.
Chapter 2 Hardware Overview of the NI PXI-7831R the NI PXI-7831R provides the reference ground point for the external signal. The NRSE input mode is used for ground-referenced signal sources; in this case, the external signal supplies its own reference ground point and the NI PXI-7831R should not supply one. In single-ended input modes, more electrostatic and magnetic noise couples into the signal connections than in differential input modes. The coupling is the result of differences in the signal path.
Chapter 2 Hardware Overview of the NI PXI-7831R amplifier, and the signal local ground reference is connected to the negative input of the instrumentation amplifier. The ground point of the signal should, therefore, be connected to AISENSE. Any potential difference between the NI PXI-7831R ground and the signal ground appears as a common-mode signal at both the positive and negative inputs of the instrumentation amplifier, and this difference is rejected by the amplifier.
Chapter 2 Hardware Overview of the NI PXI-7831R common-mode signals as long as V+in and V– in (input signals) are both within their specified input ranges. Refer to Appendix A, Specifications, for more information about input ranges. Analog Output The NI PXI-7831R has eight 16-bit AO channels. The bipolar output range is fixed at ±10 V. Some applications require that the AO channels power-on to known voltage levels.
Chapter 2 Hardware Overview of the NI PXI-7831R AO0 Channel 0 + Load VOUT 0 – AOGND0 x8 Channels NI PXI-7831R Figure 2-9. Analog Output Connections Digital I/O The NI PXI-7831R has 96 bidirectional DIO lines that can be individually configured for either input or output. When the system powers on, the DIO lines are all high-impedance. To set another power-on state, you can configure the NI PXI-7831R to automatically load a VI when the system powers on.
Chapter 2 Hardware Overview of the NI PXI-7831R devices. Because the NI PXI-7831R digital outputs provide a nominal output swing of 0 to 3.3 V (3.3 V TTL), the NI PXI-7831R DIO lines cannot drive 5 V CMOS logic levels. To interface to 5 V CMOS devices, you must provide an external pull-up resistor to 5 V. This resistor pulls up the 3.3 V digital output from the NI PXI-7831R to 5 V CMOS logic levels. For detailed DIO specifications, refer to Appendix A, Specifications.
Chapter 2 Hardware Overview of the NI PXI-7831R Figure 2-10 shows signal connections for three typical DIO applications. LED DGND +5 V TTL or LVCMOS* Compatible Devices DIO<4..7> 5 V CMOS† TTL, LVTTL, CMOS, or LVCMOS Signal DIO<0..3> +5 V Switch DGND I/O Connector NI PXI-7831R *3.3 V CMOS †Use a pull-up resistor when driving 5 V CMOS devices. Figure 2-10. Example Digital I/O Connections Figure 2-10 shows DIO<0..3> configured for digital input and DIO<4..7> configured for digital output.
Chapter 2 Hardware Overview of the NI PXI-7831R edge-sensitive or high-frequency digital signals on the DIO lines that are paired with power or ground. Because the DIO lines that are twisted with other DIO lines can couple noise onto each other, these lines should be used for static signals or for non-edge-sensitive, low-frequency digital signals. Examples of high-frequency or edge-sensitive signals include clock, trigger, pulse-width modulation (PWM), encoder, and counter signals.
Chapter 2 Hardware Overview of the NI PXI-7831R Do not drive the same PXI trigger bus line on the same PXI bus segment with the NI PXI-7831R and another device simultaneously. Such signal driving can damage both devices. NI is not liable for any damage resulting from such signal driving. Caution Refer to the PXI Hardware Specification Revision 2.1 and PXI Software Specification Revision 2.1 at www.pxisa.org for more information about PXI triggers.
Chapter 2 Hardware Overview of the NI PXI-7831R other peripheral slots and results in very precise trigger timing signals. For example, an NI PXI-7831R in slot 2 can send out an independent trigger signal to each device plugged into slots <3..15> using the PXI/LBLSTAR<0..12>. Each device receives its trigger signal on its own dedicated star trigger line. Caution Do not configure the NI PXI-7831R and another device to drive the same physical star trigger line simultaneously.
Chapter 2 Hardware Overview of the NI PXI-7831R flash memory, repeat the procedure above but return switch 1 to the OFF position in step 3. When the NI PXI-7831R is powered on with switch 1 in the ON position, the analog circuitry does not return properly calibrated data. For this reason, the switch should only be switched to the ON position while you are using software to reconfigure the NI PXI-7831R for the desired power-up behavior. Afterwards, you should return switch 1 to the OFF position.
Chapter 2 Hardware Overview of the NI PXI-7831R through areas with large magnetic fields or high electromagnetic interference. • Route signals to the device carefully. Keep cabling away from noise sources. The most common noise source in a PXI DAQ system is the video monitor. Separate the monitor from the analog signals as much as possible. The following recommendations apply for all signal connections to the NI PXI-7831R: • Separate NI PXI-7831R signal lines from high-current or high-voltage lines.
3 Calibration Calibration refers to the process of minimizing measurement and output voltage errors. On the NI PXI-7831R, these errors are corrected in the analog circuitry by onboard calibration DACs (CalDACs). Because calibration is handled by the analog circuitry, the data read from the AI channels or written to the AO channels in the FPGA VI is already calibrated. Three levels of calibration are available for the NI PXI-7831R to ensure the accuracy of its analog circuitry.
Chapter 3 Calibration onboard voltage reference. The offset and gain errors in the analog circuitry are calibrated out by adjusting the CalDACs to minimize these errors. Immediately after internal calibration, the only significant residual calibration error should be gain error due to time and temperature drift of the onboard voltage reference. This error is addressed by external calibration, which is discussed in the External Calibration section.
A Specifications This appendix lists the specifications of the NI PXI-7831R. These specifications are typical at 25 °C unless otherwise noted. Analog Input Input Characteristics Number of channels ............................... 8 Input modes............................................ DIFF, RSE, NRSE (software-selectable; selection applies to all 8 channels) Type of ADC.......................................... Successive approximation Resolution ..............................................
Appendix A Specifications Overvoltage protection ...........................±42 V Data transfers ..........................................Interrupts, programmed I/O Accuracy Information Relative Accuracy Absolute Accuracy Nominal Range (V) Noise + Quantization (µV) % of Reading Positive Full Scale Negative Full Scale 24 Hours 1 Year Offset (µV) Single Pt. Averaged 10.0 –10.0 0.0496 0.0507 2542 1779 165 Absolute Accuracy at Full Temp Scale Drift (±mV) (%/ °C) 0.0005 7.
Appendix A Specifications Settling time Accuracy Step Size 16 LSB 4 LSB 2 LSB ±20.0 V 7.5 µs 10.3 µs 40 µs ±2.0 V 2.7 µs 4.1 µs 5.1 µs ±0.2 V 1.7 µs 2.9 µs 3.6 µs Crosstalk................................................. –80 dB, DC to 100 kHz Analog Output Output Characteristics Number of channels ............................... 8 single-ended, voltage output Resolution .............................................. 16 bits, 1 in 65,536 Update time .......................................
Appendix A Specifications DC Transfer Characteristics INL..........................................................±0.5 LSB typ, ±4.0 LSB max DNL ........................................................±0.5 LSB typ, ±1 LSB max Monotonicity ..........................................16 bits, guaranteed Voltage Output Range ......................................................±10 V Output coupling ......................................DC Output impedance...................................1.
Appendix A Specifications Digital I/O Number of channels NI PXI-7831R................................. 96 input/output Compatibility ......................................... TTL Digital logic levels Level Min Max Input low voltage (VIL) 0.0 V 0.8 V Input high voltage (VIH) 2.0 V 5.5 V Output low voltage (VOL), where IOUT = –Imax (sink) — 0.4 V Output high voltage (VOH), where IOUT = Imax (source) 2.
Appendix A Specifications Timebase accuracy With onboard base clock .................±100 ppm Phase locked to PXI 10 MHz clock.......................±350 ps jitter, 300 ps skew (max) Calibration Recommended warm-up time.................15 minutes Calibration interval .................................1 year Onboard calibration reference DC level...........................................5.000 V (±3.5 mV) (actual value stored in flash memory) Temperature coefficient...................
Appendix A Specifications Physical Dimensions (not including connectors) .................... 16.0 by 10.0 cm (6.3 by 3.9 in.) I/O connectors NI PXI-7831R................................. Three 68-pin female high-density VHDCI type Maximum Working Voltage Maximum working voltage refers to the signal voltage plus the common-mode voltage. Channel-to-earth..................................... ±12 V, Installation Category I Channel-to-channel ................................
Appendix A Specifications Electromagnetic Compatibility Emissions................................................EN 55011 Class A at 10 m FCC Part 15A above 1 GHz Immunity ................................................EN 61326-1:1997 + A2:2001, Table 1 EMC/EMI ...............................................CE, C-Tick, and FCC Part 15 (Class A) Compliant Note For EMC compliance, you must operate this device with shielded cabling.
Connecting I/O Signals B This appendix describes how to make input and output signal connections to the NI PXI-7831R I/O connectors. The NI PXI-7831R has two DIO connectors with 40 DIO lines per connector, and one MIO connector with eight AI lines, eight AO lines, and 16 DIO lines. Figure B-1 shows the I/O connector locations for the NI PXI-7831R. The I/O connectors are numbered starting at zero. The text in parentheses indicates whether each I/O connector is an MIO connector or a DIO connector.
Appendix B Connecting I/O Signals NI PXI-7831R Reconfigurable I/O CONNECTOR 0 (MIO) CONNECTOR 2 (DIO) CONNECTOR 1 (DIO) Figure B-1. NI PXI-7831R Connector Locations Figure B-2 shows the I/O connector pin assignments for the I/O connectors on the NI PXI-7831R. The DIO connector pin assignment applies to connectors<1..2> on the NI PXI-7831R. The MIO connector pin assignment applies to connector 0 on the NI PXI-7831R. NI PXI-7831R User Manual B-2 ni.
Appendix B DIO38 DIO36 34 68 DIO34 32 66 31 65 DIO32 DIO30 DIO28 +5V 33 67 30 64 29 63 28 62 DIO39 DIO37 AI0AIGND1 34 68 DIO35 AI1- DIO33 DIO31 DIO29 AI2AIGND3 AI3- 32 66 31 65 DIO27 AI4AIGND5 AI5AI6- 27 61 AIGND4 26 60 25 59 AI5+ AI6+ AIGND6 +5V DGND DGND 27 61 DIO26 26 60 25 59 DGND 24 58 DIO25 DIO24 DIO23 DGND 23 57 22 56 DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND 21 55 24 58 DIO21 DIO20 No Connect AOGND0 AOGND1 23 57 22 56 17 51 16 50
Appendix B Connecting I/O Signals . Table B-1. I/O Connector Signal Descriptions Signal Name Reference Direction Description +5V DGND Output +5 VDC Source—These pins supply +5 V from the computer power supply using a self-resetting 1 A fuse. No more than 250 mA should be pulled from a single pin. AI<0..7>+ AIGND Input Positive Input for Analog Channels 0 through 7. AI<0..7>– AIGND Input Negative Input for Analog Channels 0 through 7.
Appendix B Connecting I/O Signals Table B-2. NI PXI-7831R I/O Signal Summary Driver Type Signal Type and Direction Impedance Input/ Output Protection (Volts) On/Off Source (mA at V) Sink (mA at V) Rise Time Bias +5V — DO — — — — — — AI<0..7>+ — AI 10 GΩ in parallel with 100 pF 42/35 — — — ±2 nA AI<0..7>– — AI 10 GΩ in parallel with 100 pF 42/35 — — — ±2 nA AIGND — AO — — — — — — AISENSE — AI 10 GΩ in parallel with 100 pF 42/35 — — — ±2 nA AO<0..
Appendix B Connecting I/O Signals The NSC68-262650 cable is designed to connect the signals on the NI PXI-7831R MIO connector directly to 5B and SSR backplanes. This cable has a 68-pin male VHDCI connector on one end that plugs into the NI PXI-7831R MIO connector. The other end of this cable provides two 26-pin female headers plus one 50-pin female header. One of the 26-pin headers contains all the NI PXI-7831R analog input signals.
Appendix B Connecting I/O Signals , AO0 AOGND0 AO1 AO2 AOGND2 AO3 AO4 AOGND4 AO5 AO6 AOGND6 AO7 NC 1 3 5 7 9 11 13 15 17 19 21 23 25 2 4 6 8 10 12 14 16 18 20 22 24 26 NC NC AOGND1 NC NC AOGND3 NC NC AOGND5 NC NC AOGND7 NC AO 0–7 Connector Pin Assignment AI0+ AIGND0 AI1+ AI2+ AIGND2 AI3+ AI4+ AIGND4 AI5+ AI6+ AIGND6 AI7+ AISENSE 1 3 5 7 9 11 13 15 17 19 21 23 25 2 4 6 8 10 12 14 16 18 20 22 24 26 AI0– AI1– AIGND1 AI2– AI3– AOGND3 AI4– AI5– AOGND5 AI6– AI7– AOGND7 NC AI 0–7 Connector Pin Assignme
Appendix B Connecting I/O Signals lines on the NSC68-5050 cable header. In this case, you only have access to the channels that exist on both the SSR backplane and the NSC68-5050 cable header you are using. Figure B-4 shows the connector pinouts when using the NSC68-5050 cable.
Using the SCB-68 Shielded Connector Block C This appendix describes how to connect input and output signals to the NI PXI-7831R with the SCB-68 shielded connector block. The SCB-68 has 68 screw terminals for I/O signal connections. To use the SCB-68 with the NI PXI-7831R, you must configure the SCB-68 as a general-purpose connector block. Refer to Figure C-1 for the general-purpose switch configuration. S5 S4 S3 S1 S2 Figure C-1.
Appendix C Using the SCB-68 Shielded Connector Block Quick Reference Label Figure C-2 shows the pinout that appears on the SCB-68 quick reference label that ships with the NI PXI-7831R. SCB-68 Quick Reference Label 1 NI 7811R/7831R DEVICES NATIONAL INSTRUMENTS PIN# 1 THE MIO COLUMN CORRESPONDS TO THE MIO CONNECTOR ON THE NI 7831R, AND THE DIO COLUMN CORRESPONDS TO THE DIO CONNECTORS ON THE NI 7811R / 7831R.
Technical Support and Professional Services D Visit the following sections of the National Instruments Web site at ni.com for technical support and professional services: • Support—Online technical support resources include the following: – Self-Help Resources—For immediate answers and solutions, visit our extensive library of technical support resources available in English, Japanese, and Spanish at ni.com/support.
Appendix D Technical Support and Professional Services • Calibration Certificate—If your product supports calibration, you can obtain the calibration certificate for your product at ni.com/calibration. If you searched ni.com and could not find the answers you need, contact your local office or NI corporate headquarters. Phone numbers for our worldwide offices are listed at the front of this manual. You also can visit the Worldwide Offices section of ni.
Glossary Symbol Prefix Value p pico 10 –12 n nano 10 –9 µ micro 10 – 6 m milli 10 –3 k kilo 10 3 M mega 10 6 G giga 10 9 Numbers/Symbols ° Degrees. > Greater than. ≥ Greater than or equal to. < Less than. ≤ Less than or equal to. – Negative of, or minus. Ω Ohms. / Per. % Percent. ± Plus or minus. + Positive of, or plus.
Glossary Square root of. +5V +5 VDC source signal. A A Amperes. A/D Analog-to-digital. AC Alternating current. ADC Analog-to-digital converter—an electronic device, often an integrated circuit, that converts an analog voltage to a digital number. AI Analog input. AI Analog input channel signal. AIGND Analog input ground signal. AISENSE Analog input sense signal. AO Analog output. AO Analog output channel signal. AOGND Analog output ground signal.
Glossary C C Celsius. CalDAC Calibration DAC. CH Channel—pin or wire lead to which you apply or from which you read the analog or digital signal. Analog signals can be single-ended or differential. For digital signals, you group channels to form ports. Ports usually consist of either four or eight digital channels. cm Centimeter. CMOS Complementary metal-oxide semiconductor.
Glossary DIO Digital input/output. DIO Digital input/output channel signal. DMA Direct memory access—a method by which data can be transferred to/from computer memory from/to a device or memory on the bus while the processor does something else. DMA is the fastest method of transferring data to/from computer memory. DNL Differential nonlinearity—a measure in LSB of the worst-case deviation of code widths from their ideal value of 1 LSB. DO Digital output.
Glossary I I/O Input/output—the transfer of data to/from a computer system involving communications channels, operator interface devices, and/or data acquisition and control interfaces. INL Relative accuracy. L LabVIEW Laboratory Virtual Instrument Engineering Workbench. LabVIEW is a graphical programming language that uses icons instead of lines of text to create programs. LSB Least significant bit. M m Meter. max Maximum. MIMO Multiple input, multiple output. min Minimum.
Glossary N noise An undesirable electrical signal—noise comes from external sources such as the AC power line, motors, generators, transformers, fluorescent lights, CRT displays, computers, electrical storms, welders, radio transmitters, and internal sources such as semiconductors, resistors, and capacitors. Noise corrupts signals you are trying to send or receive.
Glossary R RAM Random-access memory—the generic term for the read/write memory that is used in computers. RAM allows bits and bytes to be written to it as well as read from. Various types of RAM are DRAM, EDO RAM, SRAM, and VRAM. resolution The smallest signal increment that can be detected by a measurement system. Resolution can be expressed in bits, in proportions, or in percent of full scale. For example, a system has 12-bit resolution, one part in 4,096 resolution, and 0.0244% of full scale.
Glossary T THD Total harmonic distortion—the ratio of the total rms signal due to harmonic distortion to the overall rms signal, in decibel or a percentage. thermocouple A temperature sensor created by joining two dissimilar metals. The junction produces a small voltage as a function of the temperature. TTL Transistor-transistor logic. two’s complement Given a number x expressed in base 2 with n digits to the left of the radix point, the (base 2) number 2n – x. V V Volts.
