Reconfigurable I/O NI 781xR User Manual Reconfigurable I/O Devices for PCI and PXI/CompactPCI Bus Computers NI 781xR User Manual June 2006 371089D-01
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Important Information Warranty The NI 781xR is warranted against defects in materials and workmanship for a period of one year from the date of shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period. This warranty includes parts and labor.
Compliance Compliance with FCC/Canada Radio Frequency Interference Regulations Determining FCC Class The Federal Communications Commission (FCC) has rules to protect wireless communications from interference. The FCC places digital electronics into two classes. These classes are known as Class A (for use in industrial-commercial locations only) or Class B (for use in residential or commercial locations). All National Instruments (NI) products are FCC Class A products.
Contents About This Manual Conventions ...................................................................................................................vii Reconfigurable I/O Documentation...............................................................................viii Related Documentation..................................................................................................ix Chapter 1 Introduction About the Reconfigurable I/O Devices........................................................
Contents Appendix B Connecting I/O Signals Appendix C Using the SCB-68 Shielded Connector Block Appendix D Technical Support and Professional Services Glossary NI 781xR User Manual vi ni.
About This Manual This manual describes the electrical and mechanical aspects of the National Instruments 781xR devices, and contains information about programming and using the devices. Conventions The following conventions appear in this manual: <> Angle brackets that contain numbers separated by an ellipsis represent a range of values associated with a bit or signal name—for example, AO <3..0>. » The » symbol leads you through nested menu items and dialog box options to a final action.
About This Manual monospace Text in this font denotes text or characters that you should enter from the keyboard, sections of code, programming examples, and syntax examples. This font is also used for the proper names of disk drives, paths, directories, programs, subprograms, subroutines, device names, functions, operations, variables, filenames, and extensions. NI 781xR NI 781xR refers to all R Series devices with digital I/O.
About This Manual Related Documentation The following documents contain information you may find helpful: • PICMG CompactPCI 2.0 R3.0 • PXI Hardware Specification Revision 2.1 • PXI Software Specification Revision 2.1 • PCI Specification Revision 3.
1 Introduction This chapter describes the NI 781xR, the concept of the Reconfigurable I/O (RIO) device, optional software and equipment for using the NI 781xR, and safety information about the NI 781xR. About the Reconfigurable I/O Devices The NI 781xR devices are R Series RIO devices with 160 digital I/O (DIO) lines and four DIO connectors. • The NI 7811R has a one million gate Field-Programmable Gate Array (FPGA). • The NI 7813R has a three million gate FPGA.
Chapter 1 Introduction You can add additional I/O channels and signal conditioning using the CompactRIO R Series Expansion Chassis and CompactRIO I/O modules. Refer to Appendix A, Specifications, for detailed NI 781xR specifications. Using PXI with CompactPCI Using PXI-compatible products with standard CompactPCI products is an important feature provided by PXI Hardware Specification Revision 2.1 and PXI Software Specification Revision 2.1.
Chapter 1 Introduction Table 1-1. Pins Used by the NI PXI-781xR NI PXI-781xR Signal PXI Pin Name PXI J2 Pin Number PXI Trigger<0..7> PXI Trigger<0..7> A16, A17, A18, B16, B18, C18, E16, E18 PXI Clock 10 MHz PXI Clock 10 MHz E17 PXI Star Trigger PXI Star Trigger D17 LBLSTAR<0..12> LBL<0..12> A1, A19, C1, C19, C20, D1, D2, D15, D19, E1, E2, E19, E20 LBR<0..12> LBR<0..
Chapter 1 Introduction reconfigure the device in another application for four independent timed loops with separate I/O resources. User-Defined I/O Resources You can create your own custom measurements using the fixed I/O resources. For example, one application might require an event counter that increments when a rising edge appears on any of three digital input lines. You can implement these behaviors in the hardware for fast, deterministic performance.
Chapter 1 Introduction Software accesses the R Series device through the bus interface. The FPGA connects the bus interface and the fixed I/O to make possible timing, triggering, processing, and custom I/O measurements using the LabVIEW FPGA Module. The FPGA logic provides timing, triggering, processing, and custom I/O measurements. Each fixed I/O resource used by the application uses a small portion of the FPGA logic that controls the fixed I/O resource.
Chapter 1 Introduction and functions to control the I/O, timing, and logic of the R Series device and generate interrupts for synchronization. Select Help»Search the LabVIEW Help to view the LabVIEW Help. In the LabVIEW Help, use the Contents tab to browse to the FPGA Interface book for more information about the FPGA Interface functions. You can use Interactive Front Panel Communication to communicate directly with the FPGA VI running on the FPGA target.
Chapter 1 Introduction Cables and Optional Equipment National Instruments offers a variety of products you can use with R Series devices, including cables, connector blocks, and other accessories listed in Table 1-2. Table 1-2. Cables and Accessories Cable SH68-C68-S Cable Description Accessories Shielded 68-pin VHDCI male connector to female 0.050 series D-type connector. The cable is constructed with 34 twisted wire pairs plus an overall shield.
Chapter 1 Introduction Safety Information The following section contains important safety information that you must follow when installing and using the NI 781xR. Do not operate the NI 781xR in a manner not specified in this document. Misuse of the NI 781xR can result in a hazard. You can compromise the safety protection built into the NI 781xR if the NI 781xR is damaged in any way. If the NI 781xR is damaged, return it to NI for repair.
Chapter 1 Introduction Operate the NI 781xR at or below the measurement category1 listed in the Environmental section of Appendix A, Specifications. Measurement circuits are subjected to working voltages2 and transient stresses (overvoltage) from the circuit to which they are connected during measurement or test. Measurement categories establish standard impulse withstand voltage levels that commonly occur in electrical distribution systems.
2 Hardware Overview of the NI 781xR This chapter presents an overview of the hardware functions and I/O connectors on the NI 781xR. Figure 2-1 shows a block diagram for the NI 781xR.
Chapter 2 Hardware Overview of the NI 781xR NI 7811R Overview The NI 7811R has 160 bidirectional DIO lines and a one million gate FPGA. NI 7813R Overview The NI 7813R has 160 bidirectional DIO lines and a three million gate FPGA. Digital I/O You can configure the NI 781xR DIO lines individually for either input or output. When the system powers on, the DIO lines are all high-impedance. To set another power-on state, you can configure the NI 781xR to load a VI when the system powers on.
Chapter 2 Hardware Overview of the NI 781xR Exceeding the maximum input voltage ratings listed in Table B-2, NI 781xR I/O Signal Summary, can damage the NI 781xR and the computer. NI is not liable for any damage resulting from such signal connections. Caution Do not short the DIO lines of the NI 781xR directly to power or to ground. Doing so can damage the NI 781xR by causing excessive current to flow through the DIO lines.
Chapter 2 Hardware Overview of the NI 781xR Figure 2-2 shows DIO<0..3> configured for digital input and DIO<4..7> configured for digital output. Digital input applications include receiving TTL, LVTTL, CMOS, or LVCMOS signals and sensing external device states, such as the state of the switch shown in Figure 2-2. Digital output applications include sending TTL or LVCMOS signals and driving external devices, such as the LED shown in Figure 2-2.
Chapter 2 Hardware Overview of the NI 781xR lines are labeled RTSI/TRIG<0..6> and RTSI/OSC. On the NI PXI-781xR, the RTSI trigger lines are labeled PXI/TRIG<0..7>. In addition, the NI PXI-781xR can use the PXI star trigger line to send or receive triggers from a device plugged into Slot 2 of the PXI chassis. The PXI star trigger line on the NI PXI-781xR is PXI/STAR. The NI 781xR can configure each RTSI trigger line as either an input or an output signal.
Chapter 2 Hardware Overview of the NI 781xR Do not drive the same PXI local bus line with the NI PXI-781xR and another device simultaneously. Such signal driving can damage both devices. NI is not liable for any damage resulting from such signal driving. Caution The NI PXI-781xR local bus lines are compatible only with 3.3 V signaling LVTTL and LVCMOS levels. Caution Do not enable the local bus lines on an adjacent device if the device drives anything other than 0–3.
Chapter 2 Hardware Overview of the NI 781xR SW1, SW2, SW3 NI PX Recon I-7811R figurab le I/O CONNECTOR 3 (DIO) CONNECTOR 2 (DIO) Figure 2-3.
Chapter 2 Hardware Overview of the NI 781xR SW1, SW2, SW3 Figure 2-4. Switch Location on the NI PCI-781xR ON ON 1 2 3 a. Normal Operation (Default) 1 2 3 b. Prevent VI From Loading Figure 2-5. Switch Settings NI 781xR User Manual 2-8 ni.
Chapter 2 Hardware Overview of the NI 781xR Complete the following steps to prevent a VI stored in flash memory from loading to the FPGA: 1. Power off and unplug the PC or the PXI/CompactPCI chassis. 2. Remove the NI 781xR from the PCI or PXI/CompactPCI chassis. 3. Move SW1 to the ON position, as shown in Figure 2-5b. 4. Reinsert the NI PXI-781xR into the PC or PXI/CompactPCI chassis.
A Specifications This appendix lists the specifications of the NI 781xR. These specifications are typical at 25 °C unless otherwise noted. Digital I/O Number of channels ............................... 160 input/output Compatibility ......................................... TTL Digital logic levels Level Min Max Input low voltage (VIL) 0.0 V 0.8 V Input high voltage (VIH) 2.0 V 5.5 V Output low voltage (VOL), where IOUT = –Imax (sink) — 0.
Appendix A Specifications Reconfigurable FPGA Number of logic slices NI 7811R .........................................5,120 NI 7813R .........................................14,336 Equivalent number of logic cells NI 7811R .........................................11,520 NI 7813R .........................................32,256 Available embedded RAM NI 7811R .........................................81,920 bytes NI 7813R .........................................196,608 bytes Timebase.......................
Appendix A Specifications Power Requirement +5 VDC (±5%) NI 7811R......................................... 9 mA (typ), 50 mA (max)1 NI 7813R......................................... 9 mA (typ), 50 mA (max)1 +3.3 VDC (±5%) NI 7811R......................................... 650 mA (typ), 1,000 mA (max)2 NI 7813R.........................................
Appendix A Specifications Environmental Operating Environment The NI 781xR is intended for indoor use only. Ambient temperature range ....................0 °C to 55 °C, tested in accordance with IEC-60068-2-1 and IEC-60068-2-2 Relative humidity range..........................10% to 90%, noncondensing, tested in accordance with IEC-60068-2-56 Altitude ...................................................2,000 m at 25 °C ambient temperature Storage Environment Ambient temperature range ....................
Appendix A Specifications Safety The NI 781xR is designed to meet the requirements of the following standards of safety for electrical equipment for measurement, control, and laboratory use: • IEC 61010-1, EN 61010-1 • UL 61010-1, CAN/CSA-C22.2 No. 61010-1 Refer to the product label, or visit ni.com/certification, search by model number or product line, and click the appropriate link in the Certification column for UL and other safety certifications.
Connecting I/O Signals B This appendix describes how to make input and output signal connections to the NI 781xR I/O connectors. The NI 781xR has four DIO connectors with 40 DIO lines per connector. Figure B-1 shows the I/O connector locations for the NI 781xR. The I/O connectors are numbered starting at zero.
Appendix B Connecting I/O Signals CONNECTOR 3 (DIO) CONNECTOR 3 (DIO) CONNECTOR 0 (DIO) CONNECTOR 0 (DIO) PCI-781xR 1 Connector Overlay for the NI PXI-781x 2 CONNECTOR 2 (DIO) CONNECTOR 2 (DIO) CONNECTOR 1 (DIO) 1 CONNECTOR 1 (DIO) 2 Connector Overlay for the NI PCI-781x Figure B-1. NI 781xR Connector Locations NI 781xR User Manual B-2 ni.
Appendix B Connecting I/O Signals Figure B-2 shows the I/O connector pin assignments for the I/O connectors on the NI 781xR.
Appendix B Connecting I/O Signals end of the cable into the appropriate I/O connector and connect the other end of the cable to the appropriate signal accessory. Table B-1. I/O Connector Signal Descriptions Signal Name Reference Direction Description DGND Output +5 VDC Source—These pins supply 5 V from the computer power supply using a self-resetting 1 A fuse. No more than 250 mA should be pulled from a single pin.
Appendix B Connecting I/O Signals Connecting to SSR Signal Conditioning NI provides cables that allow you to connect signals from the NI 781xR directly to SSR backplanes for digital signal conditioning. The NSC68-5050 cable is designed to connect the signals on the NI 781xR DIO connectors directly to SSR backplanes for digital signal conditioning. This cable has a 68-pin male VHDCI connector on one end that plugs into the NI 781xR DIO connectors.
Appendix B Connecting I/O Signals DIO23 DIO22 DIO21 DIO20 DIO19 DIO18 DIO17 DIO16 DIO15 DIO14 DIO13 DIO12 DIO11 DIO10 DIO9 DIO8 DIO7 DIO6 DIO5 DIO4 DIO3 DIO2 DIO1 DIO0 +5V 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 NC NC NC NC NC NC NC NC NC DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DGND DIO 0–23 Connector Pin Assignment NC NC NC NC NC NC NC NC DIO39 DIO38 DIO37 DIO36 DIO
Using the SCB-68 Shielded Connector Block C This appendix describes how to connect input and output signals to the NI 781xR with the SCB-68 shielded connector block. The SCB-68 has 68 screw terminals for I/O signal connections. To use the SCB-68 with the NI 781xR, you must configure the SCB-68 as a general-purpose connector block. Figure C-1 illustrates the general-purpose switch configuration. S5 S4 S3 S1 S2 Figure C-1.
Technical Support and Professional Services D Visit the following sections of the National Instruments Web site at ni.com for technical support and professional services: • Support—Online technical support resources at ni.
Appendix D Technical Support and Professional Services • Calibration Certificate—If your product supports calibration, you can obtain the calibration certificate for your product at ni.com/calibration. If you searched ni.com and could not find the answers you need, contact your local office or NI corporate headquarters. Phone numbers for our worldwide offices are listed at the front of this manual. You also can visit the Worldwide Offices section of ni.
Glossary Symbol Prefix Value p pico 10 –12 µ micro 10 – 6 m milli 10 –3 M mega 10 6 A A Amperes. ASIC Application-Specific Integrated Circuit—A proprietary semiconductor component designed and manufactured to perform a set of specific functions. B bipolar A signal range that includes both positive and negative values (for example, –5 to +5 V). C C Celsius. CalDAC Calibration DAC. CH Channel—Pin or wire lead to which you apply or from which you read the analog or digital signal.
Glossary CMRR Common-mode rejection ratio—A measure of an instrument’s ability to reject interference from a common-mode signal, usually expressed in decibels (dB). common-mode voltage Any voltage present at the instrumentation amplifier inputs with respect to amplifier ground. CompactPCI Refers to the core specification defined by the PCI Industrial Computer Manufacturer’s Group (PICMG). D D/A Digital-to-analog.
Glossary E EEPROM Electrically erasable programmable read-only memory—ROM that can be erased with an electrical signal and reprogrammed. F FPGA Field-Programmable Gate Array. FPGA VI A configuration that is downloaded to the FPGA and that determines the functionality of the hardware. G glitch An unwanted signal excursion of short duration that is usually unavoidable. H h Hour. HIL Hardware-in-the-loop. Hz Hertz.
Glossary M m Meter. max Maximum. MIMO Multiple input, multiple output. min Minimum. MIO Multifunction I/O. monotonicity A characteristic of a DAC in which the analog output always increases as the values of the digital code input to it increase. mux Multiplexer—A switching device with multiple inputs that sequentially connects each of its inputs to its output, typically at high speeds, in order to measure several signals with a single analog input channel.
Glossary P PCI Peripheral Component Interconnect—A high-performance expansion bus architecture originally developed by Intel to replace ISA and EISA. It is achieving widespread acceptance as a standard for PCs and workstations. PCI offers a theoretical maximum transfer rate of 132 MB/s. port (1) A communications connection on a computer or a remote controller. (2) A digital port, consisting of four or eight lines of digital input and/or output. ppm Parts per million. pu Pull-up.
Glossary S s Seconds. S Samples. S/s Samples per second—Used to express the rate at which a DAQ board samples an analog signal. signal conditioning The manipulation of signals to prepare them for digitizing. slew rate The voltage rate of change as a function of time. The maximum slew rate of an amplifier is often a key specification to its performance. Slew rate limitations are first seen as distortion at higher signal frequencies.
Glossary VOH Volts, output high. VOL Volts, output low. Vrms Volts, root mean square. W waveform Multiple voltage readings taken at a specific sampling rate.