DAQArbTM 5411 User Manual High-Speed Arbitrary Waveform Generator DAQArb 5411 User Manual June 1997 Edition Part Number 321558A-01 © Copyright 1997 National Instruments Corporation. All Rights Reserved.
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Important Information Warranty The DAQArb 5411 is warranted against defects in materials and workmanship for a period of one year from the date of shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period. This warranty includes parts and labor.
Table of Contents About This Manual Organization of This Manual ........................................................................................ ix Conventions Used in This Manual................................................................................ x Customer Communication ............................................................................................ x Chapter 1 Introduction About Your DAQArb 5411 ............................................................................
Table of Contents Chapter 4 Arb Operation Waveform Generation .................................................................................................. 4-2 Update Rate .................................................................................................................. 4-3 Arb Mode...................................................................................................................... 4-3 Waveform Size and Resolution........................................................
Table of Contents Appendix A Specifications Appendix B Waveform Sampling and Interpolation Appendix C Customer Communication Glossary Index Figures Figure 1-1. The Relationship between the Programming Environment, NI-DAQ, and Your Hardware ............................................................... 1-4 Figure 3-1. Figure 3-2. Figure 3-5. DAQArb 5411 I/O Connector................................................................ 3-1 Output Levels and Load Termination Using a 50 Ω Output Impedance ....
Table of Contents Figure 4-15. Figure 4-16. Figure 4-17. Figure 4-18. Figure 4-19. Figure 4-20. Figure 4-21. Figure 4-22. Figure 4-23. Figure 4-24. Figure 4-25. Burst Trigger Mode for DDS Mode ...................................................... 4-16 Markers as Trigger Outputs................................................................... 4-17 Analog Output and SYNC Out Block Diagram .................................... 4-18 Waveform, Trigger, and Marker Timings .....................................
About This Manual The DAQArb 5411 User Manual describes the features, functions, and operation of the DAQArb 5411. The DAQArb 5411 is a high-speed arbitrary waveform generating device with performance comparable to standalone instruments. Organization of This Manual The DAQArb 5411 User Manual is organized as follows: • Chapter 1, Introduction, describes the DAQArb 5411, lists the optional software and optional equipment, and explains how to unpack your DAQArb 5411.
About This Manual Conventions Used in This Manual The following conventions are used in this manual: <> Angle brackets enclose the name of a key on the keyboard (for example,
Chapter 1 Introduction This chapter describes the DAQArb 5411, lists the optional software and optional equipment, and explains how to unpack your DAQArb 5411. About Your DAQArb 5411 Thank you for buying a National Instruments DAQArb 5411 device. The DAQArb 5411 family consists of two different devices for your choice of bus: the PCI-5411 for the PCI bus and the AT-5411 for the ISA bus.
Chapter 1 Introduction RTSI bus triggers on devices that use the RTSI bus or the digital trigger on the I/O connector. Detailed specifications of the DAQArb 5411 devices are in Appendix A, Specifications. What You Need to Get Started To set up and use your DAQArb 5411, you will need the following: ❑ One of the following DAQArb 5411 devices: – PCI-5411 – AT-5411 ❑ DAQArb 5411 User Manual ❑ NI-DAQ for PC compatibles, version 5.
Chapter 1 Introduction Software Programming Choices There are several options to choose from when programming your National Instruments DAQ hardware. You can use LabVIEW, LabWindows/CVI, or VirtualBench. National Instruments Application Software LabVIEW and LabWindows/CVI are innovative program development software packages for data acquisition and control applications. LabVIEW uses graphical programming, whereas LabWindows/CVI enhances traditional programming languages.
Chapter 1 Introduction Your DAQArb 5411 kit contains a free copy of VirtualBench-Arb and VirtualBench-Function Generator. VirtualBench-Arb is a turn-key application you can use to generate waveforms as you would with a standard arbitrary waveform generator. NI-DAQ Driver Software The NI-DAQ driver software is included at no charge with all National Instruments DAQ hardware. NI-DAQ is not packaged with accessory products.
Chapter 1 Introduction Optional Equipment National Instruments offers a variety of products to use with your DAQArb 5411, including probes, cables, and other accessories, as follows: • Shielded and unshielded I/O connector blocks (SCB-68, TBX-68, CB-68) • RTSI bus cables For more specific information about these products, refer to your National Instruments catalogue or web site, or call the office nearest you.
Chapter 1 Introduction Unpacking Your device is shipped in an antistatic package to prevent electrostatic damage to the device. Electrostatic discharge can damage several components on the device. To avoid such damage in handling the device, take the following precautions: DAQArb 5411 User Manual • Ground yourself via a grounding strap or by holding a grounded object. • Touch the anti-static package to a metal part of your computer chassis before removing the device from the package.
Chapter Installation and Configuration 2 This chapter describes how to install and configure your DAQArb 5411. Installation Note: You should install your driver software before installing your hardware. Refer to the DAQArb 5411 Read Me First document for software installation information. If you have an older version of NI-DAQ already in your system, that software will not work with your device. Install NI-DAQ from the NI-DAQ software CD shipped with your DAQArb 5411.
Chapter 2 Installation and Configuration 8. Replace the cover. 9. Plug in and turn on your computer. The PCI-5411 or AT-5411 is now installed. Hardware Configuration The DAQArb 5411 is a fully software-configurable, Plug and Play device. Configuration information is stored in nonvolatile memory. The Plug and Play services query the device, read the information, and allocate resources for items such as base address, interrupt level, and DMA channel.
Chapter 3 Signal Connections This chapter describes the I/O connectors, signal connections, and digital interface to the DAQArb 5411. I/O Connector The DAQArb 5411 has four connectors: three SMB connectors and a 50-pin mini-SCSI type connector, as shown in Figure 3-1. ARB SYNC PLL Ref Dig Out Figure 3-1.
Chapter 3 Signal Connections ARB Connector The ARB connector provides the waveform output. The maximum output levels on this connector depend on the type of load termination. If the output of a DAQArb 5411 terminates into a 50 Ω load, the output levels are ±5 V, as shown in Figure 3-2. If the output of DAQArb 5411 terminates into a high impedance load (HiZ), the output levels are ±10 V.
Chapter 3 Signal Connections SYNC Connector The SYNC connector is a transistor-transistor-logic (TTL) version of the sine waveform being generated at the output. You can think of the SYNC output as a very high frequency resolution, software-programmable clock source for many applications. You can also vary the duty cycle of SYNC output on the fly by software control, as shown in Figure 3-3. tp is the time period of the sine wave being generated and tw is the pulse width of the SYNC output.
Chapter 3 Signal Connections If no external reference clock is available, the DAQArb 5411 will automatically tune the internal clock to the best accuracy possible. For more information on PLL operation, refer to Chapter 4, Arb Operation. Dig Out Connector Dig Out is a 16-bit digital I/O connector that contains the 16-bit digital pattern outputs, digital pattern clock output, marker output, external trigger input, and power output.
Chapter 3 DGND NC DGND NC DGND NC DGND +5V DGND MARKER DGND RFU DGND RFU DGND PA(13) DGND PA(13) DGND PA(7) DGND PA(4) DGND PA(1) DGND 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Signal Connections EXT_TRIG NC NC NC NC NC NC +5V +5V +5V PCLK RFU RFU RFU PA(15) PA(14) PA(12) PA(11) PA(9) PA(8) PA(6) PA(5) PA(3) PA(2) PA(0) Figure 3-4.
Chapter 3 Signal Connections Table 3-1. Digital Output Connector Signal Descriptions Signal Name Type DGND – Description Digital ground EXT_TRIG Input External trigger—The external trigger input signal is a TTL-level signal that you can use to start or step through a waveform generation. For more information on trigger sources and trigger mode, see Chapter 4, Arb Operation.
Chapter 3 Note: Signal Connections The SHC50-68 connector uses the same signals as the DAQArb 5411 digital output connector, shown in Table 3-1.
Chapter 3 Signal Connections Power-Up and Reset Conditions When you power-up your computer, the DAQArb 5411 is in the following state: • Output is disabled and set to 0 V • Sample clock is set to 40 MHz • Trigger mode is set to continuous • Trigger source is set to automatic (the software provides the triggers) • Digital filter is enabled • Output attenuation remains unchanged from previous setting • Analog filter remains unchanged from previous setting • Output impedance remains unchanged
Chapter 4 Arb Operation This chapter describes how to use your DAQArb 5411. Figure 4-1 shows the DAQArb 5411 block diagram.
Chapter 4 Arb Operation functions such as arbitrating the data buses and controlling the triggers, filters, attenuators, clocks, PLL, RTSI switch, instruction FIFO, and direct digital synthesizer (DDS). The memory controller controls the waveform memory on the memory module. The data from the memory is fed to a digital to analog converter (DAC) through a half-band interpolating digital filter. The output from the DAC goes through the filter, amplifiers, attenuators and, finally, to the I/O connector.
Chapter 4 Arb Operation A Filter MUX B 12 DAC Register 12 Bits Digital Filter 16 Bits Mode Select ARB Memory 12 DAC DDS Lookup Memory Digital Filter Enable DDS 16-Bit Counter Div/2 80 MHz Oscillator Figure 4-2. Waveform Data Path Block Diagram Update Rate On the DAQArb 5411, the high-speed DAC itself is always updated at 80 MHz but the maximum update clock for waveform memory is 40 MHz.
Chapter 4 Arb Operation Waveform Size and Resolution The DAQArb 5411 stores arbitrary waveforms in memory as 16-bit digital words. Only the 12 most significant bits are sent to the digital filter and the DAC. The following sections describe the waveform memory, the sizes available, and minimum buffer size. Waveform Memory The DAQArb 5411 uses a waveform memory16 bits wide. The standard memory size is 2,000,000 samples.
Chapter 4 Arb Operation Minimum Buffer Size and Resolution The 5411 device memory architecture imposes certain restrictions on the buffer size and resolution. The minimum buffer size for Arb mode is 256 samples and the buffers must be in multiples of eight samples. For example, if you request the DAQArb to load a buffer of 257 samples, NI-DAQ will truncate the buffer to 256 samples. The last sample will not be loaded into the memory.
Chapter 4 Arb Operation Waveform Sample A Waveform Sample B Waveform Buffer/Segment 1 Waveform Buffer/Segment 2 Stage 1 Waveform Stage 1 (Loops = 3) Waveform Stage 2 (Loops = 2) Stage 2 Stage 3 Waveform Linking (Staging List) Figure 4-4. Waveform Linking and Looping Waveform Staging Figure 4-5 shows waveform staging in hardware. The instruction FIFO contains the staging list, which the DAQArb 5411 sequencer reads for waveform generation.
Chapter 4 Data In (16) Data Out (16) Address Waveform Memory Arb Operation Instructions Sequencer + Address Generator Memory Controller Buffer Number Buffer Size Buffer Loops 16-Bit Counter Marker Offset Div/2 80 MHz Oscillator Instruction FIFO Figure 4-5. Waveform Staging Block Diagram Each stage is made up of four instructions: • Buffer number—Specifies the buffer number to be generated. • Buffer size—Specifies the total count of the buffer to be generated.
Chapter 4 Arb Operation Reset Device Setup Clocks and Triggers Load Buffers Sequentially Load Staging List Start Waveform Generation Stop No Yes STOP Waveform Generation Filter, Attenuation, Impedance, Output Enable Setups On the Fly Figure 4-6. Waveform Generation Process Direct Digital Synthesis (DDS) Mode Direct digital synthesis (DDS) is a technique for deriving, under digital control, an analog frequency source from a single reference clock frequency.
Chapter 4 Arb Operation The DAQArb 5411 uses a 32-bit, high-speed accumulator with a lookup memory and a 12-bit DAC for DDS-based waveform generation. Figure 4-7 shows the building blocks for DDS-based waveform generation. Frequency Time Lookup Data Out (16) Memory (14) DDS Sequencer Frequency Time 16-Bit Counter Instruction FIFO Div/2 80 MHz Oscillator Figure 4-7. DDS Building Blocks The lookup memory is dedicated to the DDS mode only and cannot be used in Arb mode.
Chapter 4 Arb Operation Frequency Resolution and Lookup Memory For DDS-based waveform generation, you must first load one cycle of the desired waveform into the lookup memory. The size of the DDS lookup memory is 16,384 samples. Each sample is 16 bits wide. Note: One cycle of the waveform buffer loaded into the memory should be exactly equal to the size of the DDS lookup memory. Fc = update clock for the accumulator Set the DAQArb 5411 at Fc = 40 MHz.
Chapter 4 Arb Operation If you want to update every next sample in lookup memory at an integral subdivision, D, of the maximum clock rate, you should write an FCW value of 2(N-L-D+1). In other words, for an effective update rate of every sample at half the maximum clock rate, you should write an FCW value of 2(32-14-2+1), which equals 131,072. Frequency Hopping and Sweeping You can define a staging list in DDS mode for performing frequency hops and sweeps.
Arb Operation RTSI Switch Chapter 4 RTSI Trigger Lines <0..6> 7 RTSI Trigger External Trigger Digital MUX Start Trigger Software Trigger Trigger Select Figure 4-8. Waveform Generation Trigger Sources If you need to automatically trigger the waveform generation, use software to generate the triggers. A rising TTL edge is required for external triggering. For more information on triggering over RTSI lines, see the RTSI Trigger Lines section later in this chapter.
Chapter 4 Arb Operation Start Trigger End of All Stages Last Stage Generated Continuously Until Stopped Figure 4-9. Single Trigger Mode for Arb Mode Note: You can settle to a predefined state by making the last stage emulate that state. • DDS mode—After the DAQArb 5411 receives a trigger, the waveform generation starts from the first stage and continues through to the last stage. The last stage is generated repeatedly until the waveform generation is stopped.
Chapter 4 Arb Operation You can use continuous trigger mode with the both the Arb and DDS waveform generation modes, as follows: • Arb mode—Figure 4-11 uses the stages shown in Figure 4-4 to illustrate a continuous trigger mode of operation for Arb waveform generation mode. Start Trigger Repeat Until Stopped End of All Stages End of All Stages Figure 4-11. Continuous Trigger Mode for Arb Mode • DDS mode—Figure 4-12 illustrates a continuous trigger mode of operation for DDS waveform generation mode.
Chapter 4 Start Trigger Start Trigger Start Trigger Start Trigger Arb Operation Keep Going Until Stopped * End of Stage 1 End of Stage 2 End of Stage 3 End of Stage 1 Repeat Sequence *The first eight samples of the next stage are generated repeatedly. Figure 4-13. Stepped Trigger Mode for Arb Mode After any stage has been generated completely, the first eight samples of the next stage are repeated continuously until the next trigger is received.
Chapter 4 Arb Operation Start Trigger Start Trigger Start Trigger End of Stage 1 Start Triggers End of Stage 3 End of Stage 2 End of Stage 1 Continues In This Way of Triggering Until Stopped Figure 4-14. Burst Trigger Mode for Arb Mode • DDS mode—Figure 4-15 illustrates a burst trigger mode of operation for DDS mode. The switching from one stage to the other stage is phase continuous. In this mode the time instruction is not used.
Chapter 4 Note: Arb Operation The marker is generated for eight update clocks and the placement resolution of the marker is ±4 samples. If you want a marker at an offset of zero from the start of the waveform buffer, the marker will be eight samples long beginning with the first sample. A marker at an offset of seven from the start of the waveform buffer also will be eight samples long beginning with the first sample, as shown in Table 4-1.
Chapter 4 Arb Operation Note: Marker output signals are an important feature to trigger other instruments or devices at a specified time while a waveform generation is in progress. Analog Output Figure 4-17 shows the essential blocks of analog waveform generation. The 12-bit digital waveform data is fed to a high-speed DAC. A low-pass filter filters the DAC output. This filtered signal is pre-amplified before it goes to a 10 dB attenuator. The DAC output can be fine-tuned for gain and offset.
Chapter 4 Arb Operation output. Td3 is the time between the marker output and Arb output. Td4 is the pulse width on marker output. Refer to Appendix A, Specifications, for more information on these timing parameters. Td1 Trigger Input Signal (Slope: Positive, TTL) Waveform Output (±5 Vpp into 50 Ω ) Marker Output (TTL) Td2 Td3 Td4 Figure 4-18. Waveform, Trigger, and Marker Timings Note: You can switch off the analog low-pass filter at any time during waveform generation.
Chapter 4 Arb Operation 1 dB 8 dB 4 dB 32 dB 16 dB In Out 2 dB Figure 4-19. Output Attenuation Chain By attenuating the output signal, you keep the dynamic range of the DAC; that is, you do not lose any bits from the digital representation of the signal because the attenuation is done after the DAC and not before it. attenuation (in decibels) = –20 log 10 (Vo /Vi) where, Vo = desired voltage level for the output signal Vi = input voltage level.
Chapter 4 Arb Operation Output Enable You can switch off the waveform generation at the output connector by controlling the output enable relay, as shown in Figure 4-17. When the output enable relay is off, the output signal level goes to ground level. Note: Even though the output enable relay is in the off position, the waveform generation process will continue internally on the DAQArb 5411. You can use this feature to disconnect and connect different devices, on the fly, to the DAQArb 5411.
Chapter 4 Arb Operation Phase-Locked Loops Figure 4-20 illustrates the block diagram for the DAQArb 5411 PLL circuit. The PLL consists of a voltage controlled crystal oscillator (VCXO) with a tuning range of ±100 ppm. The main clock of 80 MHz is generated by this VCXO. The PLL can lock to a reference clock source from the external connector or a RTSI Osc line on the RTSI bus, or it can be tuned internally using a calibration DAC (CalDAC).
Chapter 4 Arb Operation Master/Slave Operation The DAQArb may be phase locked to other devices or other DAQArb devices in either of two ways, as shown in Figure 4-21. You can use master/slave phase locking to synchronize multiple devices in a test system. Master NI Device Slave DAQArb Ref In Slave DAQArb Slave DAQArb Ref In DAQArb Ref In Master Slave DAQArb Slave a. RTSI Bus Master/Slave Configuration Device b. External Master Figure 4-21.
Chapter 4 Arb Operation Example 2, shown in Figure 4-21b, shows an external device as the master. To phase lock the DAQArb devices to this master perform the following steps: 1. Set the master device to send any valid reference clock to the PLL reference input connector. 2. Set up the slave devices so that the PLL reference source is set to the I/O connector. 3. Set the PLL reference frequency parameter to the clock frequency sent by the master. 4.
Chapter 4 Arb Operation A B Gain (dB) C Frequency (MHz) A. Typical Analog Filter Characteristics B. Corrected Filter Characteristics C. Correction Applied Figure 4-22. Analog Filter Correction Note: You can change the filter frequency correction at any time during waveform generation. Digital Pattern Generation The DAQArb 5411 provides 16-bit digital pattern generation outputs at the digital connector.
Chapter 4 Arb Operation 80 Ω 16 Output Buffer (16-Bit) Register Waveform Memory Line Out 16 Digital Pattern Out OE* 50 Ω Clock Out Clock Pattern Enable *Output Enable Figure 4-23. Digital Pattern Generator Data Path You can enable or disable digital pattern generation through software. All linking and looping capabilities are available for digital pattern generation, as well. If you select DDS mode, the DDS data appears at the digital I/O connector.
Chapter 4 Arb Operation The sample clock for integral subdivisions of 40 MHz will always have a high pulse width of 25 ns. If the tco time is insufficient for the hold time of your device, then you can use the falling edge of the sample clock output (PCLK) to register the digital pattern data. RTSI Trigger Lines The DAQArb 5411 contains seven trigger lines and one RTSI clock line available over the RTSI bus to send and receive DAQArb 5411-specific information to other boards having RTSI connectors.
Chapter 4 Arb Operation The SYNC output generated on the DAQArb 5411 can be routed to other boards through any of the RTSI bus trigger lines.You can use this signal to provide other boards with an accurate and fine frequency resolution clock. Note: Refer to your software manual for selecting and routing signals to the RTSI bus. Calibration Calibration is the process of minimizing measurement errors by making small circuit adjustments.
Appendix A Specifications This appendix lists the specifications of the DAQArb 5411. These specifications are typical at 25° C unless otherwise stated. The operating temperature range is 0° to 50° C . Analog Output Number of channels ............................1 Resolution...........................................12 bits Maximum update rate .........................40 MHz DDS accumulator................................32 bits Frequency range Arb ...............................................
Appendix A Specifications Output attenuation .............................. 0 to 73 dB Resolution ................................... 0.001 dB steps Pre-attenuation offset Range .......................................... ±2.5 V into 50 Ω (but with less than 10 dB of attenuation, signal maximum plus offset (before attenuation) must not exceed ±5 V (into 50 Ω)) Accuracy ..................................... ±5 mV Output coupling ................................ DC Output impedance ..........................
Appendix A Specifications Analog Type .............................................7th-order L-C low-pass filter Passband ripple ............................±2 dB Waveform Specifications Memory Arb mode .....................................2,000,000, 16-bit samples DDS mode....................................16,384, 16-bit samples Segment length Arb mode .....................................256 samples min, multiples of eight samples DDS mode....................................
Appendix A Specifications Triggers Digital Trigger Compatibility .................................... TTL Response ........................................... Rising edge Pulse width (T d1) ............................... 20 ns min Trigger to waveform output (Arb mode) delay (Td2) ......................................... 76 sample clocks + 38 ns max Trigger to waveform output (DDS mode) delay (Td2) ......................................... 28 sample clocks + 150 ns max RTSI Trigger lines ...............
Appendix A Specifications Marker Output Types .................................................TTL Location .............................................User defined, one per stage Pulse width (T d4) ................................8 sample clock periods Arb output delay from marker (Td3)....50 ns max Digital Pattern Output Sample rate .........................................40 MHz max Resolution ..........................................16 bits Sample clock logic..............................
Appendix A Specifications External Clock Reference Input Frequency .......................................... 1 MHz or 5–20 MHz in 1 MHz steps Amplitude .......................................... 1 Vpk-pk ≤ level ≤ 5 Vpk-pk Internal clock Frequency .......................................... 40 MHz Initial accuracy................................... ±5 ppm Temperature stability (0° to 5° C)....... ±25 ppm Aging (1 year) .................................... ±5 ppm Mechanical Connectors ARB (output).......
Appendix Waveform Sampling and Interpolation B This appendix describes the basics of waveform sampling and interpolation. According to Shannon’s sampling theorem, a digital waveform must be updated at least twice as fast as the bandwidth of the signal to be accurately generated.
Appendix B Waveform Sampling and Interpolation Signal Power f0 og al r lte Fi 0.5fc An Digital Filter 0 fc (Interpolation Frequency) To ease the requirements of the analog filter and to get more output bandwidth, the DAQArb 5411 uses a half-band digital filter to interpolate a sample between every two samples at twice the update frequency, 2fc. Also, the DAC operates at twice the sample frequency.
Appendix Customer Communication C For your convenience, this appendix contains forms to help you gather the information necessary to help us solve your technical problems and a form you can use to comment on the product documentation. When you contact us, we need the information on the Technical Support Form and the configuration form, if your manual contains one, about your system configuration to answer your questions as quickly as possible.
Fax-on-Demand Support Fax-on-Demand is a 24-hour information retrieval system containing a library of documents on a wide range of technical information. You can access Fax-on-Demand from a touch-tone telephone at (512) 418-1111. E-Mail Support (currently U.S. only) You can submit technical support questions to the applications engineering team through e-mail at the Internet address listed below. Remember to include your name, address, and phone number so we can contact you with solutions and suggestions.
Technical Support Form Photocopy this form and update it each time you make changes to your software or hardware, and use the completed copy of this form as a reference for your current configuration. Completing this form accurately before contacting National Instruments for technical support helps our applications engineers answer your questions more efficiently.
DAQArb 5411 Hardware and Software Configuration Form Record the settings and revisions of your hardware and software on the line to the right of each item. Complete a new copy of this form each time you revise your software or hardware configuration, and use this form as a reference for your current configuration. Completing this form accurately before contacting National Instruments for technical support helps our applications engineers answer your questions more efficiently.
Documentation Comment Form National Instruments encourages you to comment on the documentation supplied with our products. This information helps us provide quality products to meet your needs. Title: DAQArb™ 5411 User Manual Edition Date: June 1997 Part Number: 321558A-01 Please comment on the completeness, clarity, and organization of the manual.
Glossary Prefix Meaning Value p- pico- 10–12 n- nano- 10–9 µ- micro- 10–6 m- milli- 10–3 k- kilo- 103 M- mega- 106 Numbers/Symbols % percent + positive of, or plus - negative of, or minus ± plus or minus / per ° degree Ω ohm +5V +5 V output signal © National Instruments Corporation G-1 DAQArb 5411 User Manual
Glossary A A amperes AC alternating current AMM advanced memory module—used for storing waveform buffers for the Arb mode of waveform generation. The standard AMM size is 2,000,000 16-bit samples.
Glossary buffer looping repeating the same buffer in the waveform memory. This method of waveform generation decreases memory requirements. burst trigger mode repeats a stage until a trigger advances the waveform to the next stage bus the group of conductors that interconnect individual circuitry in a computer. Typically, a bus is the expansion vehicle to which I/O or other devices are connected. Examples of PC buses are the AT bus (also known as the ISA bus) and the PCI bus.
Glossary DAQ data acquisition—(1) collecting and measuring electrical signals from sensors, transducers, and test probes or fixtures and inputting them to a computer for processing; (2) collecting and measuring the same kinds of electrical signals with A/D and/or DIO boards plugged into a computer, and possibly generating control signals with D/A and/or DIO boards in the same computer dB decibel—the unit for expressing a logarithmic measure of the ratio of two signal levels: dB=20log10 V1/V2, for signal
Glossary E EEPROM electrically erasable programmable read-only memory—ROM that can be erased with an electrical signal and reprogrammed external trigger a voltage pulse from an external source that triggers an event such as A/D conversion EXT_TRIG external trigger input signal F FIFO first-in first-out memory buffer—the first data stored is the first data sent to the acceptor.
Glossary H h hour hardware the physical components of a computer system, such as the circuit boards, plug-in boards, chassis, enclosures, peripherals, cables, and so on Hz hertz—the number of cycles or repetitions per second I IC integrated circuit IEEE Institute of Electrical and Electronics Engineers in.
Glossary Kword 1,024 words of memory L LabVIEW laboratory virtual instrument engineering workbench latch a digital device that stores digital data based on a control signal latched digital I/O a type of digital acquisition/generation where a device or module accepts or transfers data after a digital pulse has been received. Also called handshaked digital I/O.
Glossary Mbytes/s a unit for data transfer that means 1 million or 106 bytes/s MIPS million instructions per second—the unit for expressing the speed of processor machine code instructions MS million samples MSB most significant bit MTBF mean time between failure mux multiplexer—a switching device with multiple inputs that sequentially connects each of its inputs to its output, typically at high speeds, in order to measure several signals with a single analog input channel N NI-DAQ NI driver s
Glossary P PA<0..15> digital pattern generator outputs passband the range of frequencies which a device can properly propagate or measure pattern generation a type of handshaked (latched) digital I/O in which internal counters generate the handshaked signal, which in turn initiates a digital transfer. Because counters output digital pulses at a constant rate, this means you can generate and retrieve patterns at a constant rate because the handshaked signal is produced at a constant rate.
Glossary protocol the exact sequence of bits, characters, and control codes used to transfer data between computers and peripherals through a communications channel, such as the GPIB bus pts points R RAM random-access memory resolution the smallest signal increment that can be detected by a measurement system. Resolution can be expressed in bits, in proportions, or in percent of full scale. For example, a system has 12-bit resolution, one part in 4,096 resolution, and 0.0244 percent of full scale.
Glossary Shannon’s Sampling Theorem a law of sampling theory stating that if a continuous bandwidth-limited signal contains no frequency components higher than half the frequency at which it is sampled, then the original signal can be recovered without distortion single trigger mode when the arbitrary waveform generator goes through the staging list only once SMB a type of miniature coaxial signal connector S/s samples per second—used to express the rate at which a DAQ board samples an analog signal
Glossary U update rate the rate at which a DAC is updated V V volts VCXO voltage controlled crystal oscillator VI virtual instrument—(1) a combination of hardware and/or software elements, typically used with a PC, that has the functionality of a classic standalone instrument (2) a LabVIEW software module (VI), which consists of a front panel user interface and a block diagram program W waveform multiple voltage readings taken at a specific sampling rate waveform buffers the collection of 16-bit
Index Numbers analog output, 4-18 to 4-21 analog output and SYNC out block diagram, 4-18 output attenuation, 4-19 to 4-20 output enable, 4-21 output impedance, 4-20 pre-attenuation offset, 4-21 SYNC output and duty cycle, 4-19 waveform, trigger, and marker timings (figure), 4-19 Arb mode, 4-3 to 4-8 minimum buffer size and resolution, 4-5 waveform linking and looping, 4-5 to 4-8 waveform memory, 4-4 waveform size and resolution, 4-4 to 4-5 calibration, 4-28 DAQArb 5411 block diagram, 4-1 digital pattern g
Index connectors. See I/O connector; SHC50-68 50-pin cable connector.
Index I frequency hopping and sweeping, 4-11 frequency instruction, 4-9 frequency resolution, 4-10 to 4-11 lookup memory, 4-9, 4-10 to 4-11 single trigger mode, 4-13 stepped trigger mode, 4-15 time instruction, 4-9 update rate (note), 4-3 VirtualBench-Function Generator (note), 4-2 documentation conventions used in manual, x organization of manual, ix installation and configuration hardware configuration, 2-2 installation procedure, 2-1 to 2-2 installing optional memory module, 2-2 unpacking DAQArb 5411,
Index RTSI trigger lines, 4-27 to 4-28 locking DAQArb 5411 to other National Instrument cards (note), 3-3 purpose and use, 4-27 to 4-28 specifications, A-4 trigger lines and routing (figure), 4-27 mechanical specifications, A-6 memory, waveform. See waveform memory.
Index trigger specifications digital trigger, A-4 RTSI, A-4 triggering, 4-11 to 4-16 burst trigger mode, 4-15 to 4-16 continuous trigger mode, 4-13 to 4-14 modes of operation, 4-12 to 4-16 single trigger mode, 4-12 to 4-13 stepped trigger mode, 4-14 to 4-15 trigger sources, 4-11 to 4-12 mechanical, A-6 operational modes, A-4 sine spectral purity, A-2 SYNC out, A-4 timing I/O, A-3 triggers digital trigger, A-4 RTSI, A-4 voltage output, A-1 to A-2 stages instructions, 4-6 maximum number (note), 4-6 waveform
Index waveform generation process (figure), 4-8 waveform staging, 4-6 to 4-7 waveform memory Arb mode, 4-3 architecture (figure), 4-4 overview, 4-4 waveform sampling and interpolation, B-1 to B-2 waveform segment, 4-5 waveform size and resolution, 4-4 to 4-5 minimum buffer size and resolution, 4-5 waveform memory, 4-4 waveform staging, 4-6 to 4-7 block diagram, 4-7 instructions in stages, 4-7 maximum number of stages (note), 4-7 DAQArb 5411 User Manual I-6 © National Instruments Corporation