Datasheet
Table Of Contents
- Thermocouple EMF to Temperature Converter, ±1.5 °C Maximum Accuracy
- 1.0 Electrical Characteristics
- 2.0 Typical Performance Curves
- FIGURE 2-1: Typical Temperature Accuracy from NIST ITS-90 Database, Type K.
- FIGURE 2-2: Typical Temperature Accuracy from NIST ITS-90 Database, Type J.
- FIGURE 2-3: Typical Temperature Accuracy from NIST ITS-90 Database, Type N.
- FIGURE 2-4: Temperature Sensitivity with 18-Bit Resolution, Type K.
- FIGURE 2-5: Temperature Sensitivity with 18-Bit Resolution, Type J.
- FIGURE 2-6: Temperature Sensitivity with 18-Bit Resolution, Type N.
- FIGURE 2-7: Typical Temperature Accuracy from NIST ITS-90 Database, Type S.
- FIGURE 2-8: Typical Temperature Accuracy from NIST ITS-90 Database, Type R.
- FIGURE 2-9: Typical Temperature Accuracy from NIST ITS-90 Database, Type E.
- FIGURE 2-10: Temperature Sensitivity with 18-Bit Resolution, Type S.
- FIGURE 2-11: Temperature Sensitivity with 18-Bit Resolution, Type R.
- FIGURE 2-12: Temperature Sensitivity with 18-Bit Resolution, Type E.
- FIGURE 2-13: Typical Temperature Accuracy from NIST ITS-90 Database, Type T.
- FIGURE 2-14: Typical Temperature Accuracy from NIST ITS-90 Database, Type B.
- FIGURE 2-15: Input Offset Error Voltage (VIN+, VIN-).
- FIGURE 2-16: Temperature Sensitivity with 18-Bit Resolution, Type T.
- FIGURE 2-17: Temperature Sensitivity with 18-Bit Resolution, Type B.
- FIGURE 2-18: Full-Scale Gain Error.
- FIGURE 2-19: Input Noise, % of Full-Scale.
- FIGURE 2-20: Cold-Junction Sensor Temperature Accuracy.
- FIGURE 2-21: SDA and Alert Outputs, VOL across VDD.
- FIGURE 2-22: Integral Nonlinearity across VDD.
- FIGURE 2-23: Cold-Junction Sensor Temperature Accuracy Distribution.
- FIGURE 2-24: Alert Outputs, VOH across VDD.
- FIGURE 2-25: I2C Inactive IDD across VDD.
- FIGURE 2-26: I2C Active IDD across VDD.
- FIGURE 2-27: Shutdown Current, ISHDN across VDD.
- FIGURE 2-28: SDA, SCL and ADDR Input Pins Leakage Current, ILEAK across VDD.
- FIGURE 2-29: I2C Interface Clock Stretch Duration, tSTRETCH across VDD.
- FIGURE 2-30: Temperature Calculation Duration, tCALC change across VDD.
- 3.0 Pin Description
- 4.0 Serial Communication
- 4.1 2-Wire Standard Mode I2C Protocol-Compatible Interface
- TABLE 4-1: MCP9600 Serial Bus protocol descriptions
- FIGURE 4-1: Device Addressing.
- FIGURE 4-2: Clock Stretching.
- FIGURE 4-3: Timing Diagram to Set a Register Pointer and Read a Two Byte Data.
- FIGURE 4-4: Timing Diagram to Set a Register Pointer and Read a Two Byte Data.
- FIGURE 4-5: Timing Diagram to Set a Register Pointer and Read a Two Byte Data.
- FIGURE 4-6: Timing Diagram to Sequential Read all Registers Starting from TH Register.
- 5.0 Functional Description
- FIGURE 5-1: Functional Block Diagram.
- Register 5-1: REGISTER POINTER
- TABLE 5-1: Summary of Registers and Bit Assignments
- 5.1 Thermocouple Temperature Sensor Registers
- EQUATION 5-1: Temperature Conversion
- FIGURE 5-2: Thermocouple Register’s Block Diagram.
- Register 5-2: Thermocouple Temperature Register (Read only)
- EQUATION 5-2: Temperature Conversion
- FIGURE 5-3: Thermocouple Hot-Junction Register – TΔ Block Diagram.
- Register 5-3: HOT-Junction Temperature register (READ only)
- EQUATION 5-3: Temperature Conversion
- TABLE 5-2: Resolution vs. Conversion Time
- FIGURE 5-4: Thermocouple Cold-Junction Register – TC Block Diagram.
- Register 5-4: COLD-JUNCTION TEMPERATURE REGISTER
- TABLE 5-3: ADC Resolution
- FIGURE 5-5: Delta Sigma Analog to Digital Converter, ADC Core – Block Diagram.
- Register 5-5: SAMPLE: 24-bit Register
- 5.2 Sensor Status and Configuration Registers
- 5.3 Temperature Alert Registers
- TABLE 5-4: Alert Limit Registers
- Register 5-9: Alert Limits 1, 2, 3 and 4 registers
- FIGURE 5-8: Alert Limits Set to Detect TH and TC.
- FIGURE 5-9: Alert Limits Boundary Conditions and Output Characteristics when Set to Detect TH.
- TABLE 5-5: Alert Hysteresis Registers
- Register 5-10: Alert 1, 2, 3 and 4 Hysteresis Register
- FIGURE 5-10: Graphical Description of Alert Output Hysteresis Direction.
- TABLE 5-6: Alert CONFIG. Registers
- Register 5-11: Alert 1, 2, 3 and 4 Configuration Register
- Register 5-12: Device ID and revision ID register
- 6.0 Application Information
- 6.1 Layout Considerations
- 6.2 Thermal Considerations
- 6.3 Device Features
- TABLE 6-2: Recommended Resistor Values for I2C Addressing
- FIGURE 6-4: I2C Address Selection Implementation.
- FIGURE 6-5: Thermocouple Input Stage.
- FIGURE 6-6: Adding Open-Circuit Detection Resistors.
- FIGURE 6-7: Adding a Low-Pass Filter.
- FIGURE 6-8: Adding Open-Circuit Detection Resistors with an Input Low-Pass Filter.
- FIGURE 6-9: Adding Ferrite Beads.
- 7.0 Packaging Information
- Appendix A: Revision History
- Product Identification System
- Trademarks
- Worldwide Sales and Service
2015-2016 Microchip Technology Inc. DS20005426B-page 41
MCP9600
7.0 PACKAGING INFORMATION
7.1 Package Marking Information
PIN 1PIN 1
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC
®
designator for Matte Tin (Sn)
* This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
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20-Lead MQFN (5x5x1.0 mm) Example
MCP9600
E/MX ^^
1520256
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