User manual

8X96 ADC and DAC User Manual Page 30 of 54
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8X96 DAC - Special DIP Switch Options
Both ADC and DAC units are equipped with a dip switch mounted on the main
motherboard next to BNC wordclock jack. This switch allows tailoring certain features of
the D/A converters to the actual system setup.
Bold are factory default settings
Switch # ON OFF
1 NOT ASSIGNED NOT ASSIGNED
2 SYNCHRO AES INS AES INS INDEPENDENT
3 NOT ASSIGNED NOT ASSIGNED
4 WCK OUT =44/48 for 88/96 data WCK OUT =88/96 for 88/96 data
5 TDIF IN is 24 bit truncate bits 17-24 on TDIF in
6 Cloning Disabled Cloning MDM Connectors
7 AES is Dual Wire for 88/96 AES is Hi Speed for 88/96
8 NOT ASSIGNED NOT ASSIGNED
Description:
Synchro AES Ins– In “on” position AES receivers for pairs 3-4, 5-6, 7-8 are slaved to
AES IN 1-2. This setting must be used when simultaneous format conversion of 4
synchronous AES pairs is required. It also must be used when DAC is resolved to its
internal clock and an external AES source is slaved to DAC clock.
WCK I/O =44/48 for 88/96 data– This setting facilitates synchronizing the converter
working in 88/96kHz mode with external equipment working in 44/48k mode. For
example Tascam machines require 44/48k wordclock , when they record 88/96k in
bit/sample split mode. This setting affects both wck in and out.
Truncate bits 17-24 on TDIF in (default OFF, default pass 24 bit) – This setting
truncates lowest 8 bit on TDIF input, allowing only for 16 bit input resolution. We have