Datasheet

Reserved Addresses
Address 4Bh is allocated for production needs and cannot be used.
Addresses listed in the table below are reserved or assigned
according to the SMBus specifi cation and may not be usable. Refer to
the SMBus specifi cation for further information.
Address
(decimal)
Comment
0 General Call Address / START byte
1 CBUS address
2 Address reserved for different bus format
3-7 Reserved for future use
8 SMBus Host
9-11 Assigned for Smart Battery
12 SMBus Alert Response Address
40 Reserved for ACCESS.bus host
44-45 Reserved by previous versions of the SMBus specifi cation
55 Reserved for ACCESS.bus default address
64-68 Reserved by previous versions of the SMBus specifi cation
72-75 Unrestricted addresses
97 SMBus Device Default Address
120-123 10-bit slave addressing
124-127 Reserved for future use
I
2
C/SMBus – Timing
The setup time, tset, is the time data, SDA, must be stable before the
rising edge of the clock signal, SCL. The hold time thold, is the time
data, SDA, must be stable after the rising edge of the clock signal,
SCL. If these times are violated incorrect data may be captured or
meta-stability may occur and the bus communication may fail. When
confi guring the product, all standard SMBus protocols must be fol-
lowed, including clock stretching. Refer to the SMBus specifi cation, for
SMBus electrical and timing requirements.
This product does not support the BUSY fl ag in the status commands
to indicate product being too busy for SMBus response. Instead a bus-
free time delay according to this specifi cation must occur between
every SMBus transmission (between every stop & start condition). In
case of storing the RAM content into the internal non-volatile memory
(commands STORE_USER_ALL and STORE_DEFAULT_ALL) an addi-
tional delay of 100 ms has to be inserted. A 100 ms delay should be
inserted after a restore from internal non-volatile memory (commands
RESTORE_DEFAULT_ALL and RESTORE_USER_ALL).
fi gure below. Recommended resistor values for hard-wiring PMBus
addresses are shown in the table. 1% tolerance resistors are required.
Index R
SA
[kΩ] Index R
SA
[kΩ]
0 10 13 34.8
1 11 14 38.3
2 12.1 15 42.2
3 13.3 16 46.4
4 14.7 17 51.1
5 16.2 18 56.2
6 17.8 19 61.9
7 19.6 20 68.1
8 21.5 21 75
9 23.7 22 82.5
10 26.1 23 90.9
11 28.7 24 100
12 31.6
The PMBus address follows the equation below:
Eq. 7. PMBus Address (decimal) = 25 x (SA1 index) + (SA0 index)
The user can theoretically confi gure up to 625 unique PMBus
addresses, however the PMBus address range is inherently limited to
128. Therefore, the user should use index values 0 - 4 on the SA1 pin
and the full range of index values on the SA0 pin, which will provide
125 device address combinations. The user shall also be aware
of further limitations of the address space as stated in the SMBus
Specifi cation.
Note that address 0x4B is allocated for production needs and
cannot be used.
Optional PMBus Addressing
Alternatively the PMBus address can be defi ned by connecting the
SA0/SA1 pins according to the table below. SA1 = open for products
with no SA1 pin.
SA0
low open high
SA1
low 20h 21h 22h
open 23h 24h 25h
high 26h 27h Reserved
Low = Shorted to PREF
Open = High impedance
High = Logic high, GND as reference,
Logic High defi nitions see Electrical Specifi cation
SA0
SA1
PREF
R
SA1
R
SA0
Schematic of connection of address resistor.
Setup and hold times timing diagram
OKDx-T/50-W12-C
50A Digital PoL DC-DC Converter Series
MDC_OKDx-T/50-W12-C.A04 Page 33 of 41
www.murata-ps.com/support