Datasheet

Typical Application Circuit

Unused input pins

Unused SDA, SCL and GCB pins should still have pull-up resistors as

speciﬁ ed.

Unused VTRK or SYNC pins should be left open or connected to the

PREF pin.

Unused CTRL pin can be left open due to internal pull-up.

VSET and SA0/SA1 pins must be used. These pins must have pin-

strap resistors or strapping settings as speciﬁ ed.

PWB layout considerations

The pin-strap resistors, RSET, and RSA0/RSA1 should be placed as

close to the product as possible to minimize loops that may pick up

noise.

Avoid current carrying planes under the pin-strap resistors and the

PMBus signals.

The capacitor CI (or capacitors implementing it) should be placed

as close to the input pins as possible.

Capacitor CO (or capacitors implementing it) should be placed close

to the load.

Care should be taken in the routing of the connections from the

sensed output voltage to the S+ and S– terminals. These sensing

connections should be routed as a differential pair, preferably between

ground planes which are not carrying high currents. The routing

should avoid areas of high electric or magnetic ﬁ elds.

Pin Designation Function

1A, 1B VIN Input Voltage

2A, 2B GND Power Ground

3A, 3B VOUT Output Voltage

4A +S Positive sense

4B −S Negative sense

5A VSET Output voltage pinstrap

5B VTRK Voltage Tracking input

6A SALERT PMBus Alert

6B SDA PMBus Data

7A SCL PMBus Clock

7B SA1 PMBus address pinstrap 1

8A SA0 PMBus address pinstrap 0

8B SYNC Synchronization I/O

9A PG Power Good

9B CTRL Remote Control

10A GCB Group Communication Bus

10B PREF Pin-strap reference

Standalone operation with PMBus communication. Top view of product footprint.

SIP Version: Pin layout, top view (component placement for illustration only).

OKDx-T/50-W12-C

50A Digital PoL DC-DC Converter Series

MDC_OKDx-T/50-W12-C.A04 Page 30 of 41