Datasheet

falls below 85% of the nominal voltage. These limits may be changed
via the PMBus interface. A PG delay period is defi ned as the time from
when all conditions within the product for asserting PG are met to
when the PG signal is actually asserted. The default PG delay is set to
10 ms. This value can be reconfi gured using the PMBus interface.
For products with DLC the PG signal is by default asserted directly
after the DLC operation have been completed. If DLC is disabled the
confi gured PG delay will be used. This can be reconfi gured using the
PMBus interface.
Switching Frequency
The fundamental switching frequency is 320 kHz, which yields
optimal power effi ciency. The switching frequency can be set to any
value between 200 kHz and 640 kHz using the PMBus interface. The
switching frequency will change the effi ciency/power dissipation,
load transient response and output ripple. For optimal control loop
performance in a product without DLC, the control loop must be re-
optimized when changing the switching frequency.
Synchronization
Synchronization is a feature that allows multiple products to be syn-
chronized to a common frequency. Synchronized products powered
from the same bus eliminate beat frequencies refl ected back to the
input supply, and also reduces EMI fi ltering requirements. Eliminating
the slow beat frequencies (usually <10 kHz) allows the EMI fi lter to be
designed to attenuate only the synchronization frequency. Synchroni-
zation can also be utilized for phase spreading, described in section
Phase Spreading.
The products can be synchronized with an external oscillator or one
product can be confi gured with the SYNC pin as a SYNC Output work-
ing as a master driving the synchronization. All others on the same
synchronization bus must be confi gured with SYNC Input. Default
confi guration is using the internal clock, independently of signal at the
SYNC pin.
Phase Spreading
When multiple products share a common DC input supply, spreading
of the switching clock phase between the products can be utilized.
This dramatically reduces input capacitance requirements and effi -
ciency losses, since the peak current drawn from the input supply is
effectively spread out over the whole switch period. This requires that
the products are synchronized. Up to 16 different phases can be used.
The phase spreading of the product can be confi gured using the
PMBus interface.
Parallel Operation (Current Sharing)
Paralleling multiple products can be used to increase the output cur-
rent capability of a single power rail. By connecting the GCB pins of
each device and confi guring the devices as a current sharing rail, the
units will share the current equally, enabling up to 100% utilization of
the current capability for each device in the current sharing rail. The
product uses a low-bandwidth, fi rst-order digital current sharing by
Output Voltage Adjust Limitation using PMBus
In addition to the maximum output voltage limitation by the pin-strap
resistor RSET, there is also a limitation in how much the output volt-
age can be increased while the output is enabled. If output is disabled
then RSET resistor is the only limitation.
Example:
If the output is enabled with output voltage set to 1.0 V, then it is only
possible to adjust/change the output voltage up to 1.7- V as long as
the output is enabled.
V
O
setting
when enabled [V]
V
O
set range
while enabled [V]
0.000 – 0.988 ~0.2 to >1.2
0.988 – 1.383 ~0.2 to >1.7
1.383 – 1.975 ~0.2 to >2.5
1.975 – 2.398 ~0.2 to >2.97
2.398 – 2.963 ~0.2 to >3.68
2.963 – 3.753 ~0.2 to >4.65
Over Voltage Protection (OVP)
The product includes over voltage limiting circuitry for protection
of the load. The default OVP limit is 15% above the nominal output
voltage. If the output voltage exceeds the OVP limit, the product can
respond in different ways:
1. Initiate an immediate shutdown until the fault has been cleared.
The user can select a specifi c number of retry attempts.
2. Turn off the high-side MOSFET and turn on the low-side MOSFET.
The low-side MOSFET remains ON until the device attempts a
restart, i.e. the output voltage is pulled to ground level (crowbar
function).
The default response from an overvoltage fault is to immediately
shut down as in 2. The device will continuously check for the pres-
ence of the fault condition, and when the fault condition no longer
exists the device will be re-enabled. For continuous OVP when
operating from an external clock for synchronization, the only allowed
response is an immediate shutdown. The OVP limit and fault response
can be reconfi gured using the PMBus interface.
Under Voltage Protection (UVP)
The product includes output under voltage limiting circuitry for
protection of the load. The default UVP limit is 15% below the nominal
output voltage. The UVP limit can be reconfi gured using the PMBus
interface.
Power Good
The product provides a Power Good (PG) fl ag in the Status Word reg-
ister that indicates the output voltage is within a specifi ed tolerance
of its target level and no fault condition exists. If specifi ed in section
Connections, the product also provides a PG signal output. The PG pin
is active high and by default open-drain but may also be confi gured
as push-pull via the PMBus interface.
By default, the PG signal will be asserted when the output reaches
above 90% of the nominal voltage, and de-asserted when the output
OKDx-T/50-W12-C
50A Digital PoL DC-DC Converter Series
MDC_OKDx-T/50-W12-C.A04 Page 23 of 41
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